m95m01-r STMicroelectronics, m95m01-r Datasheet - Page 18

• Manufacturer Part Number: m95m01-r
• Description: 1 Mbit Serial Spi Bus Eeprom With High Speed Clock
• Manufacturer: STMicroelectronics

Instructions
6.2
18/39
Write Disable (WRDI)
One way of resetting the Write Enable Latch (WEL) bit is to send a Write Disable instruction
to the device.
As shown in
and the bits of the instruction byte are shifted in, on Serial Data Input (D).
The device then enters a wait state. It waits for a the device to be deselected, by Chip Select
(S) being driven High.
The Write Enable Latch (WEL) bit, in fact, becomes reset by any of the following events:
G
G
G
G
Figure 8.
Power-up
WRDI instruction execution
WRSR instruction completion
WRITE instruction completion.
Figure
Write Disable (WRDI) sequence
S
C
D
Q
8, to send this instruction to the device, Chip Select (S) is driven Low,
High Impedance
0
1
2
Instruction
3
4
5
6
7
AI03750D
M95M01-R