m24c32 STMicroelectronics, m24c32 Datasheet

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m24c32

Manufacturer Part Number
m24c32
Description
64/32 Kbit Serial I??c Bus Eeprom
Manufacturer
STMicroelectronics
Datasheet

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FEATURES SUMMARY
Table 1. Product List
January 2005
Two-Wire I
Supports 400kHz Protocol
Single Supply Voltage:
Write Control Input
BYTE and PAGE WRITE (up to 32 Bytes)
RANDOM and SEQUENTIAL READ Modes
Self-Timed Programming Cycle
Automatic Address Incrementing
Enhanced ESD/Latch-Up Protection
More than 1 Million Erase/Write Cycles
More than 40-Year Data Retention
Reference
4.5 to 5.5V for M24Cxx
2.5 to 5.5V for M24Cxx-W
1.8 to 5.5V for M24Cxx-R
M24C64
M24C32
2
C Serial Interface
M24C64
M24C64-W
M24C64-R
M24C32
M24C32-W
M24C32-R
Part Number
64Kbit and 32Kbit Serial I²C Bus EEPROM
Figure 1. Packages
UFDFPN8 (MB)
TSSOP8 (DW)
2x3mm² (MLP)
8
150 mil width
169 mil width
8
PDIP8 (BN)
SO8 (MN)
1
1
M24C64
M24C32
1/26

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m24c32 Summary of contents

Page 1

... Table 1. Product List Reference Part Number M24C64 M24C64 M24C64-W M24C64-R M24C32 M24C32 M24C32-W M24C32-R January 2005 64Kbit and 32Kbit Serial I²C Bus EEPROM Figure 1. Packages M24C64 M24C32 8 1 PDIP8 (BN SO8 (MN) 150 mil width TSSOP8 (DW) 169 mil width UFDFPN8 (MB) 2x3mm² (MLP) 1/26 ...

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... M24C64, M24C32 TABLE OF CONTENTS FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Table 1. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 2. Logic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Power On Reset: VCC Lock-Out Write Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Figure 3. DIP, SO, TSSOP and UFDFPN Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Serial Clock (SCL Serial Data (SDA Chip Enable (E0, E1, E2 Write Control (WC) ...

Page 3

... Figure 16.UFDFPN8 (MLP8) – 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm Table 21. UFDFPN8 (MLP8) – 8-lead Ultra thin Fine pitch Dual Flat Package No lead 2x3mm, Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Table 22. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 REVISION HISTORY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Table 23. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 (1) , M24Cxx-W6 and M24Cxx-W3 M24C64, M24C32 3/26 ...

Page 4

... M24C64, M24C32 SUMMARY DESCRIPTION 2 These I C-compatible electrically erasable pro- grammable memory (EEPROM) devices are orga- nized as 8192 x 8 bits (M24C64) and 4096 x 8 bits (M24C32). Figure 2. Logic Diagram E0-E2 M24C64 SCL M24C32 uses a two-wire serial interface, comprising a bi-directional data line and a clock line. The devic- ...

Page 5

... Write operations are allowed. When Write Control (WC) is driven High, Device Select and Address bytes are acknowledged, Data bytes are not acknowledged. ) for an I BUS fc = 100kHz fc = 400kHz 100 1000 C BUS (pF) M24C64, M24C32 . (Figure 4. indicates how establish the Device Select SS , and Bus ...

Page 6

... M24C64, M24C32 2 Figure Bus Protocol SCL SDA START Condition 1 SCL MSB SDA START Condition 1 SCL MSB SDA Table 3. Device Select Code Device Type Identifier b7 Device Select Code 1 Note: 1. The most significant bit, b7, is sent first. 2. E0, E1 and E2 are compared against the respective external pins on the memory device. ...

Page 7

... MEMORY ORGANIZATION The memory is organized as shown in Figure 6. Block Diagram WC E0 Control Logic E1 E2 SCL SDA Address Register and Counter Figure 6.. High Voltage Generator I/O Shift Register Data Register 1 Page X Decoder M24C64, M24C32 AI06899 7/26 ...

Page 8

... M24C64, M24C32 DEVICE OPERATION 2 The device supports the I C protocol. This is sum- marized in Figure 5.. Any device that sends data on to the bus is defined transmitter, and any device that reads the data receiver. The device that controls the data transfer is known as the bus master, and the other as the slave de- vice ...

Page 9

... NoAck, and the location is not modified. If, in- stead, the addressed location is not Write-protect- ed, the device replies with Ack. The bus master terminates the transfer by generating a Stop con- th bit” time dition, as shown in M24C64, M24C32 NO ACK DATA IN NO ACK DATA IN 1 DATA IN 2 AI01120C ...

Page 10

... M24C64, and b11-b5 for M24C32) are the same. If more bytes are sent than will fit up to the end of the row, a condition known as ‘roll-over’ ...

Page 11

... Write cycle, it 9., is: responds with an Ack, indicating that the device is ready to receive the second part of the instruction (the first byte of this instruction having been sent during Step 1). M24C64, M24C32 YES DEVICE SELECT with Continue the Random READ Operation ...

Page 12

... M24C64, M24C32 Figure 10. Read Mode Sequences CURRENT ADDRESS DEV SEL READ RANDOM ADDRESS DEV SEL * READ SEQUENTIAL CURRENT DEV SEL READ SEQUENTIAL RANDOM DEV SEL * READ ACK DATA OUT N Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1 ...

Page 13

... If the bus master does not drive Serial Data (SDA) Low during this time, the device termi- nates the data transfer and switches to its Stand- by mode. Figure 10.. INITIAL DELIVERY STATE The device is delivered with all bits in the memory array set to 1 (each byte contains FFh). M24C64, M24C32 13/26 ...

Page 14

... M24C64, M24C32 MAXIMUM RATING Stressing the device outside the ratings listed in Table 7. may cause permanent damage to the de- vice. These are stress ratings only, and operation of the device at these, or any other conditions out- side those indicated in the Operating sections of Table 7. Absolute Maximum Ratings ...

Page 15

... CC T Ambient Operating Temperature A ment Conditions summarized in the relevant tables. Designers should check that the operating conditions in their circuit match the measurement conditions when relying on the quoted parame- ters. Parameter Parameter Parameter M24C64, M24C32 Min. Max. Unit 4.5 5.5 V –40 85 °C Min. Max. ...

Page 16

... M24C64, M24C32 Table 11. AC Measurement Conditions Symbol C Load Capacitance L Input Rise and Fall Times Input Levels Input and Output Timing Reference Levels Figure 11. AC Measurement I/O Waveform Input Levels 0.8V CC 0.2V CC Table 12. Input Parameters 1,2 Symbol Parameter C Input Capacitance (SDA Input Capacitance (other pins) ...

Page 17

... Stand-by mode SDA in Hi-Z OUT SS CC, V =1.8V, f =100kHz (rise/fall time < 30ns 1 0 M24C64, M24C32 Min. Max. Unit ± 2 µA ± 2 µ µA –0. 0.4 V Min. Max. Unit ± 2 µ ...

Page 18

... M24C64, M24C32 Table 16. AC Characteristics (M24Cxx-6, M24Cxx-W6 and M24Cxx-W3) Test conditions specified in Symbol Alt Clock Frequency C SCL t t Clock Pulse Width High CHCL HIGH t t Clock Pulse Width Low CLCH LOW 2 t SDA Fall Time t F DL1DL2 t t Data In Set Up Time ...

Page 19

... Figure 12. AC Waveforms tCHCL SCL tDLCL SDA In tCHDX START Condition SCL SDA In tCHDH STOP Condition SCL tCLQV SDA Out tCLCH tCLDX tDXCX SDA Change SDA Input tW Write Cycle tCLQX Data Valid M24C64, M24C32 tCHDH tDHDL STOP START Condition Condition tCHDX START Condition AI00795C 19/26 ...

Page 20

... M24C64, M24C32 PACKAGE MECHANICAL Figure 13. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline b Note: Drawing is not to scale. Table 18. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data Symbol Typ 3.30 b 0.46 b2 1.52 c 0.25 D 9.27 E 7.87 E1 6.35 e 2. 3.30 20/ ...

Page 21

... H A1 millimeters Min. Max. Typ. 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 – – 0.050 5.80 6.20 0.25 0.50 0.40 0.90 0° 8° 8 0.10 M24C64, M24C32 h x 45˚ inches Min. Max. 0.053 0.069 0.004 0.010 0.013 0.020 0.007 0.010 0.189 0.197 0.150 0.157 – – 0.228 0.244 0.010 0.020 0.016 0.035 0° 8° 8 0.004 ...

Page 22

... M24C64, M24C32 Figure 15. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline Note: Drawing is not to scale. Table 20. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data Symbol Typ 1.000 3.000 e 0.650 E 6.400 E1 4.400 L 0.600 L1 1.000 ...

Page 23

... L 0. ddd Min Max 0.50 0.60 0.022 0.00 0.05 0.20 0.30 0.010 0.079 1.55 1.65 0.05 0.118 0.15 0.25 – – 0.020 0.40 0.50 0.018 0.15 0.30 8 M24C64, M24C32 UFDFPN-01 inches Typ Min Max 0.020 0.024 0.000 0.002 0.008 0.012 0.061 0.065 0.002 0.006 0.010 – – 0.016 0.020 0.006 0.012 8 23/26 ...

Page 24

... Flow (HRCF) is described in the quality note QNEE9801. Please ask your nearest ST sales office for a copy. 2. This range is Not for New Design, and will soon be replaced by the M24Cxx-W range. 3. The UFDFPN8 package is available in M24C32 devices only not available in M24C64 devices. For a list of available options (speed, package, etc ...

Page 25

... Z IL 05-Jan-2005 6.0 UFDFPN8 package added. Small text changes. Description of Revision made more precise, and value (min) and V (min) improved. Soldering temperature IO CC WCL M24C64, M24C32 for E2-E0 and WC added (max) changed. NS changed. 25/26 ...

Page 26

... M24C64, M24C32 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice ...

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