at88rf256-12 ATMEL Corporation, at88rf256-12 Datasheet - Page 4

• Manufacturer Part Number: at88rf256-12
• Description: 125 Khz Rfid Transponder Chip
• Manufacturer: ATMEL Corporation

For both the “Write Lock” and “Write Configuration” com-
mands, part of the 32-bit block must be the correct
sequence of 0101…, starting with 0 in each case. If any bit
is improperly received, the command is aborted. If any of
these protections are violated, or if there is a transmission
or protection failure (lock bit set, password not entered) or if
an illegal command is sent, the part will immediately
resume its power-up read sequence.
For the write lock command, a successful “write page”
command must have been previously executed since the
last power cycle, in order for the “write lock” command to
be executed. This is intended as an additional safety fea-
ture to prevent inadvertent lock commands.
Data Locking
Within the lock byte, each lock bit determines whether the
corresponding 32-bit user page can be written. If it is a 1,
then writes are prohibited, if 0, writes are enabled or per-
mitted. The data sent to the chip with the “write lock byte”
operation is OR’ed with the data already in the lock byte
and then rewritten to the EEPROM. Once a user page is
locked, it may never be unlocked and can never be written
to.
T h e r e a r e t w o a d d i t i o n a l l o c k b i t s f o r p a g e s 8
(CONFIG_LOCK) and 9 (PW_LOCK). They operate slightly
different from the user lock bits because there is no OR
function. CONFIG_LOCK, if “1”, prevents the execution of
the “Write Configuration Bits” command, while PW_LOCK if
“1” prevents execution of the “Write Password” command.
Turning on CONFIG_LOCK does NOT lock the value of the
bits within the lock byte but does prevent further change to
the PW_LOCK bit.
Upon shipment, pages 0 and 7 are loaded with a unique
32-bit serial number derived from various manufacturing
information. The 32-bit serial number is derived in such a
way that over the manufacturing history of the part, each
die will have a unique serial number. Page 7 is locked upon
shipment and cannot be changed in the field.
Command Timing Diagram
4
Frame
Power
-up
Listening
Window
AT88RF256-12
Power-up Frame
Ignored
Listening
Window
Ignored
Command
Passwords
If the password mode is enabled with PW_ON, read and
write commands are prohibited until the correct password
is sent using the “Check Password” command. If the pass-
word is correct an internal latch is set and subsequent
read, write and lock commands (to any page, including the
password page) are permitted. If the wrong password is
sent, the command is aborted and the chip reverts to the
normal power-up sequence. Writes to locked pages are
never permitted regardless of passwords. The password
check latch is cleared when power is removed. There is no
command that can be used to directly read the password
page, regardless of whether or not the password option
(PW_ON) is enabled.
Anti-collision
In order to support multiple tags within the field at the same
time, a random delay time between ID transmissions can
be enabled. This feature is implemented by having the chip
randomly disable its activity (transmission of ID and recep-
tion of commands) during selected frames. Commands are
only honored during the listening window of those frames in
which data was actually transmitted by the chip.
Depending on the value of the RANDOM option, frames will
be enabled on average once in 8, 32 or 128 times. The
maximum delay is twice the average, while at the minimum
two frames may be transmitted back to back.
To implement this feature, the tags must be programmed
with error detection information within the ID field so that
the reader can detect the condition when two tags transmit
their ID at exactly the same time. Because of the random
delay feature, in most cases the next transmissions for
these two chips will not overlap.
The “Disable” command can be used with the random
delay feature to permit an increased number of tags to be
identified. Once a tag has been properly read by the reader
unit, the reader sends the “Disable” command to the tag
during the first listening window after the ID transmission.
Until the power is removed, that tag no longer sends its ID
frame.
Data
Parity
(5ms if write)
Write Delay