at25df161 ATMEL Corporation, at25df161 Datasheet - Page 26

• Manufacturer Part Number: at25df161
• Description: 16-megabit 2.7-volt Minimum Spi Serial Flash Memory
• Manufacturer: ATMEL Corporation

9.6
26
Read Sector Protection Registers
AT25DF161 [Preliminary]
If the desire is to only change the SPRL bit without performing a Global Protect or Global Unpro-
tect, then the system can simply write a 0Fh to the first byte of the Status Register to change the
SPRL bit from a logical “1” to a logical “0” provided the WP pin is deasserted. Likewise, the sys-
tem can write an F0h to change the SPRL bit from a logical “0” to a logical “1” without affecting
the current sector protection status (no changes will be made to the Sector Protection
Registers).
When writing to the first byte of the Status Register, bits 5, 4, 3, and 2 will not actually be modi-
fied but will be decoded by the device for the purposes of the Global Protect and Global
Unprotect functions. Only bit 7, the SPRL bit, will actually be modified. Therefore, when reading
the first byte of the Status Register, bits 5, 4, 3, and 2 will not reflect the values written to them
but will instead indicate the status of the WP pin and the sector protection status. Please refer to
“Read Status Register” on page 35
format and what values can be read for bits 5, 4, 3, and 2.
The Sector Protection Registers can be read to determine the current software protection status
of each sector. Reading the Sector Protection Registers, however, will not determine the status
of the WP pin.
To read the Sector Protection Register for a particular sector, the CS pin must first be asserted
and the opcode of 3Ch must be clocked in. Once the opcode has been clocked in, three address
bytes designating any address within the sector must be clocked in. After the last address byte
has been clocked in, the device will begin outputting data on the SO pin during every subse-
quent clock cycle. The data being output will be a repeating byte of either FFh or 00h to denote
the value of the appropriate Sector Protection Register.
At clock frequencies above f
ing at clock frequencies above f
device in order to determine the correct status of the appropriate Sector Protection Register.
Table 9-3.
Deasserting the CS pin will terminate the read operation and put the SO pin into a high-imped-
ance state. The CS pin can be deasserted at any time and does not require that a full byte of
data be read.
In addition to reading the individual Sector Protection Registers, the Software Protection Status
(SWP) bits in the Status Register can be read to determine if all, some, or none of the sectors
are software protected (refer to
Output Data
00h
FFh
Read Sector Protection Register – Output Data
Sector Protection Register Value
Sector Protection Register value is 0 (sector is unprotected).
Sector Protection Register value is 1 (sector is protected).
CLK
, the first byte of data output will not be valid. Therefore, if operat-
“Read Status Register” on page 35
CLK
and
, at least two bytes of data must be clocked out from the
Table 11-1 on page 36
for details on the Status Register
for more details).
3687B–DFLASH–11/08