pnx8526 NXP Semiconductors, pnx8526 Datasheet - Page 31

• Manufacturer Part Number: pnx8526
• Description: Programmable Source Decoder With Integrated Peripherals
• Manufacturer: NXP Semiconductors

Philips Semiconductors
9397 750 15101
Product data sheet
6.2.1 Multi-function pins
Table 15:
Table 16
Section 6.2
of signals.
Remark: The PNX8526 has a number of General Purpose Input Output (GPIO) pins.
Some of these are dedicated pins, while others are configured as alternate signals on
multifunction pins. The standard function of these pins may not be required in some
system configurations.
For more details on GPIO functionality, see “PNX8526 User Manual, Chapter 10” .
Symbol
PCI_FRAME
PCI_DEVSEL
PCI_PAR
PCI_AD[13]
PCI_AD[9]
PCI_AD[6]
XIO_SEL[2]
XIO_ACK
GPIO[6]
I2S_IO_OSCLK
I2S_IO_SD[2]
SPDIF_IN
DV1_DATA[7]
DV1_DATA[3]
DV1_VALID
I2S_IN1_WS
I2S_IN2_WS
DV2_DATA[7]
DV2_DATA[0]
V
SS
identifies and describes alternate signals that are available in the PNX8526. In
All pins (in alpha-numeric sequence)
alternate signals are also identified by a hash (#) within each functional group
Pin
AF6
AF7
AF8
AF9
AF10
AF11
AF12
AF13
AF14
AF15
AF16
AF17
AF18
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
Rev. 02 — 11 July 2005
Programmable source decoder with integrated peripherials
Group
PCI
PCI
PCI
PCI
PCI
PCI
MISC
MISC
GPIO
AVIF
AVIF
AVIF
DVB
DVB
DVB
AVIF
AVIF
DVB
DVB
PWR
PWR
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I/O
I/O
I
I
-
-
Description
frame is asserted to indicate start of bus
transaction and remains asserted until final data
phase begins
device select is asserted when a target address
is decoded and remains asserted to indicate that
a target device is selected
parity supports even parity across the PCI
address/data bus AD[31:0]) and command/ byte
enable bus (PCI_CBE[3:0]); bus master drives
PCI_PAR for address and write data phases;
target drives PCI_PAR for the read data phases
multiplexed address or data bit 13
multiplexed address or data bit 9
multiplexed address or data bit 6
external input/output select2
XIO acknowledge (EEPROM)
general purpose input/output bit 6
audio input/output oversample clock
audio input/output data bit 2
multi-channel/SPDIF input
ITU-656 VIP data bit 7
ITU-656 VIP data bit 3
ITU-656 VIP data valid
audio in1 word select
audio in2 word select
digital video transport stream2 data bit 7
digital video transport stream2 data bit 0
system ground
system ground
…continued
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
PNX8526
31 of 65