clc408 ETC-unknow, clc408 Datasheet - Page 6

• Manufacturer Part Number: clc408
• Description: High-speed, Low-power Line Driver
• Manufacturer: ETC-unknow

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DC Design (level shifting)
Figure 4 shows a DC level shifting circuit for inverting
gain configurations. V
of
produced by V
DC Design (DC offsets)
The DC offset model shown in Fig. 5 is used to calculate
the output offset voltage. The equation for output offset
voltage is:
The current offset terms, I
each other . The specifications are stated in terms of
magnitude only. Therefore, the terms V
can have either polarity.
resistance seen at both input pins does not reduce the
output offset voltage.
V
ref
V
R
o
I
in
eq1
V
V
R
R
ref
in
ref
Figure 3: Transimpedance Gain
Figure 4: Level Shifting Circuit
f
V
,
R
Figure 5: DC Offset Model
in
os
which is independent of the DC output
t
.
R
R
I
I
I
eq2
BN
BN
3
2
BI
V
t
+
-
os
ref
CLC408
+
-
V
R
V
CC
EE
produces a DC output level shift
eq1
8
4
+
CLC408
CLC408
-
+
-
6.8 F
0.1 F
0.1 F
6.8 F
BN
+
R
Matching the equivalent
1
6
f
+
and I
R
R
R
R
eq2
f
f
f
BI
, do not track
os
V
I
408 Fi 3
, I
BI
o
BN
R
R
V
V
L
, and I
o
f
o
BI
6
DC Design (output loading)
R
load seen by the output in Figure 5 is:
The equivalent output load (R
enough so that the output current can produce the
required output voltage swing.
AC Design (small signal bandwidth)
The CLC408 current-feedback amplifier bandwidth is a
function of the feedback resistor (R
gain (A
to
Other AC specifications will also be degraded.
Decreasing R
peaking, and for very small values of R
will occur.
AC Design (minimum slew rate)
Slew rate influences the bandwidth of large signal
sinusoids. To determine an approximate value of slew
rate necessary to support a large sinusoid, use the
following equation:
where V
The slew rate of the CLC408 in inverting gains is always
higher than in non-inverting gains.
AC Design (linear phase/constant group delay)
The recommended value of R
and
improve phase linearity when |A
approximately 50% over its recommended value. Some
adjustment of R
linearity for your application.
(small signal bandwidth) sub-section for other effects
of changing R
Propagation delay is approximately equal to group delay.
Group delay is related to phase by this equation:
where (f) is the phase in degrees. Linear phase implies
constant group delay. The technique for achieving linear
phase also produces a constant group delay.
AC Design (peaking)
Peaking is sometimes observed with the recommended
R
then investigate the possible causes and remedies
listed below:
f
L
. If a small increase in R
, R
R
R
1
f
L(eq)
f
.
, and R
a
V
As a rule, if R
peak
). The bandwidth is approximately proportional
reasonably
=
gd
is the peak output sinusoidal voltage.
g
f
f
f
R
R
.
load the op amp output. The equivalent
from the recommended value increases
L
L
SR
f
|| R
|| (R
may be needed to achieve phase
360
f
f
, inverting and transimpedance gain
doubles, the bandwidth is cut in half.
1
f
5
+ R
•
linear
f
d
•
eq2
d
f
V
does not solve the problem,
f
peak
f
f
), non-inverting gain
produces minimal peaking
L(eq)
phase
f
), not of the DC voltage
See the AC Design
v
360
) needs to be large
| < 6, increase R
1
response.
f
f
oscillation
f
To
f