clc408 ETC-unknow, clc408 Datasheet

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clc408

Manufacturer Part Number
clc408
Description
High-speed, Low-power Line Driver
Manufacturer
ETC-unknow
Datasheet
© 1996 National Semiconductor Corporation
Printed in the U.S.A.
N
Comlinear CLC408
High-Speed, Low-Power Line Driver
General Description
The Comlinear CLC408 delivers high output drive current
(96mA), but consumes minimal quiescent supply current
(1.5mA). Its current feedback architecture, fabricated in an
advanced complementary bipolar process, maintains consistent
performance over a wide range of gains and signal levels.
The CLC408 offers superior dynamic performance with a
130MHz small-signal bandwidth, 350V/ s slew rate and 4.6ns
rise/fall times (2V
high output drive current, and high-speed performance make
the CLC408 a great choice for many portable and battery-
powered personal communication and computing systems.
The CLC408 drives low-impedance loads, including capacitive
loads, with little change in performance. Into a 100
delivers -85/-64dBc second/third harmonic distortion (A
V
conditions, it produces only -67/-62dBc second/third harmonic
distortion. It is also an excellent choice for driving high currents
into single-ended transformers and coils.
When driving the input of high resolution A/D converters, the
CLC408 provides excellent -85/-75dBc second/third harmonic
distortion and fast settling time (A
R
o
L
V
=1k ).
V
= 2V
inA
oB
R
t1
pp
, f = 1MHz). With a 25
CLC426
CLC408
+
R
R
-
f2
pp
f1
+
). The combination of low quiescent power,
-
R
Typical Application Diagram
g2
R
t2
R
Full Duplex Cable Driver
m1
v
= +2, V
Z
0
load, and the same
o
= 2V
R
m1
pp
R
t2
, f = 1MHz,
R
g2
v
CLC408
load, it
= +2,
CLC426
+
-
R
R
f1
f2
+
-
Features
Applications
96mA output current
1.5mA supply current
130MHz bandwidth (Av = +2)
-85/-75dBc HD2/HD3 (1MHz)
15ns settling to 0.2%
350V/ s slew rate
Dual version available (CLC418)
Coaxial cable driver
Twisted pair driver
Transformer/coil driver
High capacitive load driver
Video line driver
ADSL/HDSL driver
Portable/battery-powered line driver
A/D driver
R
V
V
t1
1M
inB
oA
Non-Inverting Frequency Response
(A
v
= +2V/V, R
V
Frequency (Hz)
EE
L
= 25 )
10M
DIP & SOIC
Pinout
http://www.national.com
100M
August 1996

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clc408 Summary of contents

Page 1

... The combination of low quiescent power, pp high output drive current, and high-speed performance make the CLC408 a great choice for many portable and battery- powered personal communication and computing systems. The CLC408 drives low-impedance loads, including capacitive loads, with little change in performance. Into a 100 ...

Page 2

... Notes A) J-level: spec is 100% tested at +25°C, sample tested at +85°C. LC/MC-level: spec is 100% wafer probed at +25°C. B) J-level: spec is sample tested at +25°C. C) The output current sourced or sunk by the CLC408 can exceed the maximum safe output current. http://www.national.com (A = +2, R ...

Page 3

... Output Amplitude ( 2nd Harmonic Distortion -60 10MHz -65 -70 5MHz -75 -80 2MHz -85 1MHz -90 - Output Amplitude ( +5V 25°C, CLC408AJ unless specified) CC Frequency Response vs = =1.21k = =0.95k R =100 =1k Gain f R ...

Page 4

... R dominates the circuit performance. Increasing R the following: Decreases loop gain Decreases bandwidth v Reduces gain peaking f Lowers pulse response overshoot Affects frequency response phase linearity +5V 25°C, CLC408AJ unless specified) CC Small Signal Pulse Response 0. 0. ...

Page 5

... CLC408 DESIGN INFORMATION Standard op amp circuits work with CFB op amps. There are 3 unique design considerations for CFB: The feedback resistor (R in Figures 1-3) sets f AC performance R cannot be replaced with a short or a capacitor f The output offset voltage is not reduced by balancing input resistances The following sub-sections cover: ...

Page 6

... To determine an approximate value of slew rate necessary to support a large sinusoid, use the V o following equation where V peak The slew rate of the CLC408 in inverting gains is always higher than in non-inverting gains. AC Design (linear phase/constant group delay) The recommended value of R and a R improve phase linearity when |A f ...

Page 7

... The CLC408’s output current can exceed the maximum safe output current. To limit the output current to < 96mA: Limit the output voltage swing with diode ...

Page 8

... The circuit shown in the Typical Application schematic on the front page operates as a full duplex cable driver which allows simultaneous transmission and reception of signals on one transmission line. The circuit on either side of the transmission line uses the CLC408 as a cable driver, and the CLC426 as a receiver. V version used to match the transmission line ...

Page 9

... We selected the component values as follows 3.0k , for unity gain of the CLC408 the characteristic impedance the transmission line ≥ 100 , the recommended value for the CLC426 ||R ) – These values give excellent isolation from the other input: ...

Page 10

... Connect U2’s input between Use an inverting gain configuration for U2 to change the polarity of V Pick the combination that best suits your needs CLC408 - and D need to be Schottky or PIN diodes the recommended feedback resistor value ...

Page 11

This page intentionally left blank. 11 http://www.national.com ...

Page 12

Customer Design Applications Support National Semiconductor is committed to design excellence. For sales, literature and technical support, call the National Semiconductor Customer Response Group at 1-800-272-9959 or fax 1-800-737-7018. Life Support Policy National’s products are not authorized for use as ...

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