mk50dn512zcll10 Freescale Semiconductor, Inc, mk50dn512zcll10 Datasheet - Page 17
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mk50dn512zcll10
Manufacturer Part Number
mk50dn512zcll10
Description
K50 Sub-family Data Sheet Supports The Following
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MK50DN512ZCLL10.pdf
(73 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MK50DN512ZCLL10
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
1. The analog supply current is the sum of the active or disabled current for each of the analog modules on the device. See
2. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock . MCG configured for FEI mode.
3. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
4. 100MHz core and system clock, 50MHz bus and FlexBus clock, and 25MHz flash clock. MCG configured for FEI mode. All
5. 25MHz core and system clock, 25MHz bus clock, and 12.5MHz FlexBus and flash clock. MCG configured for FEI mode.
6. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
7. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
8. 2 MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks
9. Data reflects devices with 128 KB of RAM. For devices with 64 KB of RAM, power consumption is reduced by 2 μA.
10. Includes 32kHz oscillator current and RTC operation.
5.1.5.1 Diagram: Typical IDD_RUN operating behavior
The following data was measured under these conditions:
Freescale Semiconductor, Inc.
I
Symbol
DD_VBAT
• MCG in FEI mode (39.0625 kHz IRC), except for 1 MHz core (FBE)
• All peripheral clocks disabled except FTFL
• LVD disabled, USB regulator disabled
• No GPIOs toggled
• Code execution from flash
each module's specification for its supply current.
All peripheral clocks disabled.
peripheral clocks enabled, but peripherals are not in active operation.
peripheral clocks enabled, and peripherals are in active operation.
disabled. Code executing from flash.
enabled but peripherals are not in active operation. Code executing from flash.
disabled.
Average current when CPU is not accessing
RTC registers at 3.0 V
Description
• @ –40 to 25°C
• @ 70°C
• @ 105°C
Table 6. Power consumption operating behaviors (continued)
K50 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Preliminary
Min.
—
—
—
TBD
TBD
Typ.
0.7
Max.
TBD
TBD
TBD
Unit
μA
μA
μA
Notes
General
10
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