mk50n512cmd100 Freescale Semiconductor, Inc, mk50n512cmd100 Datasheet - Page 59

• Manufacturer Part Number: mk50n512cmd100
• Description: K50 Sub-family Data Sheet
• Manufacturer: Freescale Semiconductor, Inc

6.8.8 SDHC specifications
The following timing specs are defined at the chip I/O pin and must be translated
appropriately to arrive at timing specs/constraints for the physical interface.
Freescale Semiconductor, Inc.
Num
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SD8
SDHC_CLK
Output SDHC_CMD
Output SDHC_DAT[3:0]
Input SDHC_CMD
Input SDHC_DAT[3:0]
Symbol
t
t
t
t
f
t
t
t
fpp
fpp
fpp
TLH
THL
THL
THL
OD
WL
WH
OD
SDHC output / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
SDHC input / card inputs SDHC_CMD, SDHC_DAT (reference to SDHC_CLK)
Operating voltage
Clock frequency (low speed)
Clock frequency (SD\SDIO full speed)
Clock frequency (MMC full speed)
Clock frequency (identification mode)
Clock low time
Clock high time
Clock rise time
Clock fall time
SDHC output delay (output valid)
SDHC input setup time
SDHC input hold time
Description
K50 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Table 46. SDHC switching specifications
SD3
SD6
Figure 27. SDHC timing
SD2
SD7
Card input clock
Preliminary
SD8
SD1
Peripheral operating requirements and behaviors
Min.
2.7
—
—
-5
0
0
0
0
7
7
5
0
Max.
400
400
3.6
6.5
25
20
—
—
—
—
3
3
MHz
MHz
Unit
kHz
kHz
ns
ns
ns
ns
ns
ns
ns
V
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