mk50n512cmd100 Freescale Semiconductor, Inc, mk50n512cmd100 Datasheet

mk50n512cmd100

Manufacturer Part Number

mk50n512cmd100

Description

K50 Sub-family Data Sheet

Manufacturer

Freescale Semiconductor, Inc

Datasheet

1.MK50N512CMD100.pdf (73 pages)

Current page: 1 of 73
Download datasheet (2Mb)

Freescale Semiconductor

Data Sheet: Product Preview

K50 Sub-Family Data Sheet

Supports the following:

MK50N512CLQ100,

MK50N512CMD100

Features

• Operating Characteristics

• Performance

• Memories and memory interfaces

• Clocks

• System peripherals

• Security and integrity modules

This document contains information on a product under development. Freescale

reserves the right to change or discontinue this product without notice.

Preliminary

– Voltage range: 1.71 to 3.6 V

– Flash write voltage range: 1.71 to 3.6 V

– Temperature range (ambient): -40 to 85°C

– Up to 100 MHz ARM Cortex-M4 core with DSP

– Up to 512 KB program flash memory on non-

– Up to 128 KB RAM

– Serial programming interface (EzPort)

– FlexBus external bus interface

– 3 to 32 MHz crystal oscillator

– 32 kHz crystal oscillator

– Multi-purpose clock generator

– 10 low-power modes to provide power optimization

– Memory protection unit with multi-master

– 16-channel DMA controller, supporting up to 64

– External watchdog monitor

– Software watchdog

– Low-leakage wakeup unit

– Hardware CRC module to support fast cyclic

– 128-bit unique identification (ID) number per chip

instructions delivering 1.25 Dhrystone MIPS per

MHz

FlexMemory devices

based on application requirements

protection

request sources

redundancy checks

• Human-machine interface

• Analog modules

• Timers

• Communication interfaces

– Low-power hardware touch sensor interface (TSI)

– General-purpose input/output

– Two 16-bit SAR ADCs

– Programmable gain amplifier (up to x64) integrated

– Two 12-bit DACs

– Two operational amplifiers

– Two transimpedance amplifiers

– Three analog comparators (CMP) containing a 6-bit

– Voltage reference

– Programmable delay block

– Eight-channel motor control/general purpose/PWM

– Two 2-channel quadrature decoder/general purpose

– Periodic interrupt timers

– 16-bit low-power timer

– Carrier modulator transmitter

– Real-time clock

– USB full-/low-speed On-the-Go controller with on-

– Three SPI modules

– Two I2C modules

– Six UART modules

– Secure Digital host controller (SDHC)

– I2S module

into each ADC

DAC and programmable reference input

timer

timers

chip transceiver

K50P144M100SF2

Document Number: K50P144M100SF2

Rev. 4, 3/2011

Related parts for mk50n512cmd100

Related keywords

mk50n512cmd100 datasheet
mk50n512cmd100 data sheet
mk50n512cmd100 pdf datasheet
mk50n512cmd100 component
mk50n512cmd100 part
mk50n512cmd100 distributor
mk50n512cmd100 RoHS
mk50n512cmd100 datasheet download