sak-c167cr-16rm ETC-unknow, sak-c167cr-16rm Datasheet - Page 62

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sak-c167cr-16rm

Manufacturer Part Number
sak-c167cr-16rm
Description
Microcomputer Components 16-bit Cmos Single-chip Microcontrollers
Manufacturer
ETC-unknow
Datasheet

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AC Characteristics
CLKOUT and READY
V
T
T
T
C
C
Parameter
CLKOUT cycle time
CLKOUT high time
CLKOUT low time
CLKOUT rise time
CLKOUT fall time
CLKOUT rising edge to
ALE falling edge
Synchronous READY
setup time to CLKOUT
Synchronous READY
hold time after CLKOUT
Asynchronous READY
low time
Asynchronous READY
setup time
Asynchronous READY
hold time
Async. READY hold time
after RD, WR high
(Demultiplexed Bus)
Notes
1)
2)
Semiconductor Group
C167CR-16RM
A
A
A
CC
L
L
= 0 to +70 °C
= -40 to +85 °C
= -40 to +125 °C for SAK-C167CR-16RM
These timings are given for test purposes only, in order to assure recognition at a specific clock edge.
Demultiplexed bus is the worst case. For multiplexed bus 2TCL are to be added to the maximum values. This
adds even more time for deactivating READY.
The 2t
(for PORT0, PORT1, Port 4, ALE, RD, WR, BHE, CLKOUT) = 100 pF
(for Port 6, CS) = 100 pF
= 5 V
A
1)
and t
1)
10 %;
C
refer to the next following bus cycle, t
2)
V
for SAB-C167CR-16RM
for SAF-C167CR-16RM
SS
20Dec96@09:25h Intermediate Version
= 0 V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
29
30
31
32
33
34
35
36
37
58
59
60
CC
CC
CC
CC
CC
CC
SR
SR
SR
SR
SR
SR
min.
50
20
15
0 +
15
0
65
15
0
0
Max. CPU Clock
t
A
= 20 MHz
60
F
refers to the current bus cycle.
max.
50
5
5
10 +
0
+ 2
+
2)
t
F
t
A
t
+
A
t
C
min.
2TCL
TCL – 5
TCL – 10
0 +
15
0
2TCL + 15
15
0
0
1/2TCL = 1 to 20 MHz
Variable CPU Clock
t
A
max.
2TCL
5
5
10 +
TCL - 25
+ 2
2)
t
A
t
+
A
t
C
+
t
F
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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