sak-c167cr-16rm ETC-unknow, sak-c167cr-16rm Datasheet - Page 46

• Manufacturer Part Number: sak-c167cr-16rm
• Description: Microcomputer Components 16-bit Cmos Single-chip Microcontrollers
• Manufacturer: ETC-unknow

AC Characteristics
Definition of Internal Timing
The internal operation of the C167CR-16RM is controlled by the internal CPU clock f
edges of the CPU clock can trigger internal (eg. pipeline) or external (eg. bus cycles) operations.
The specification of the external timing (AC Characteristics) therefore depends on the time between
two consecutive edges of the CPU clock, called “TCL” (see figure below).
Figure 11
Generation Mechanisms for the CPU Clock
The CPU clock signal can be generated via different mechanisms. The duration of TCLs and their
variation (and also the derived external timing) depends on the used mechanism to generate f
This influence must be regarded when calculating the timings for the C167CR-16RM.
Direct Drive
When pin P0.15 (P0H.7) is low (‘0’) during reset the on-chip phase locked loop is disabled and the
CPU clock is directly driven from the internal oscillator with the input clock signal.
The frequency of f
duration of an individual TCL) is defined by the duty cycle of the input clock f
The timings listed below that refer to TCLs therefore must be calculated using the minimum TCL
that is possible under the respective circumstances. This minimum value can be calculated via the
following formula:
For two consecutive TCLs the deviation caused by the duty cycle of f
duration of 2TCL is always 1/f
for timings that require an odd number of TCLs (1,3,...). Timings that require an even number of
TCLs (2,4,...) may use the formula 2TCL = 1/f
Note: The address float timings in Multiplexed bus mode (t
Semiconductor Group
C167CR-16RM
Phase Locked Loop Operation
Direct Clock Drive
f
f
f
f
TCL (TCL
XTAL
CPU
XTAL
CPU
max
TCL
CPU
= 1/f
min
directly follows the frequency of f
20Dec96@09:25h Intermediate Version
XTAL
= 1/f
XTAL
XTAL
* DC
. The minimum value TCL
* DC
max
) instead of TCL
min
XTAL
44
.
XTAL
min
.
(DC = duty cycle)
11
so the high and low time of f
min
and t
therefore has to be used only once
45
) use the maximum duration of
XTAL
is compensated so the
XTAL
A
A
A A A
A
A A
A A A
TCL TCL
TCL TCL
.
A
A
A A A
A
A A
A A A
A
A
A A A
A
A A
A A A
CPU
CPU
(ie. the
. Both
CPU
.