sak-xc161cj-16f40f Infineon Technologies Corporation, sak-xc161cj-16f40f Datasheet - Page 60

• Manufacturer Part Number: sak-xc161cj-16f40f
• Description: 16-bit Single-chip Microcontroller
• Manufacturer: Infineon Technologies Corporation

Table 11
Parameter
Configuration pull-
down current
Level inactive hold
current
Level active hold
current
XTAL1, XTAL3 input
current
Pin capacitance
(digital inputs/outputs)
1) Keeping signal levels within the limits specified in this table, ensures operation without overload conditions.
2) If XTAL1 is driven by a crystal, reaching an amplitude (peak to peak) of 0.4 ×
3) If XTAL3 is driven by a crystal, reaching an amplitude (peak to peak) of 0.25 ×
4) This parameter is tested for P2, P3, P4, P6, P7, P9.
5) The maximum deliverable output current of a port driver depends on the selected output driver mode, see
6) As a rule, with decreasing output current the output levels approach the respective supply level (
7) This specification is not valid for outputs which are switched to open drain mode. In this case the respective
8) An additional error current (
9) The driver of P3.15 is designed for faster switching, because this pin can deliver the reference clock for the
10) This specification is valid during Reset for configuration on RD, WR, EA, PORT0.
11) The maximum current may be drawn while the respective signal line remains inactive.
12) The minimum current must be drawn to drive the respective signal line active.
13) This specification is valid during Reset for configuration on ALE.
14) This specification is valid during Reset for pins P6.4-0, which can act as CS outputs.
15) Not subject to production test - verified by design/characterization.
Data Sheet
For signal levels outside these specifications, also refer to the specification of the overload current
Table
V
output will float and the voltage results from the external circuitry.
the definition of the overload coupling factor
bus interface (CLKOUT). The maximum leakage current for P3.15 is, therefore, increased to 1 µA.
The pull-ups on RD and WR (WRL/WRH) are also active during bus hold.
The pull-down on ALE is also active during bus hold.
The pull-ups on CS outputs are also active during bus hold.
The pull-up on pin HLDA is active when arbitration is enabled and the EBC operates in slave mode.
OH
→
14)
14)
12,
V
DDP
Current Limits for Port Output
). However, only the levels for nominal output currents are guaranteed.
13)
DC Characteristics (Operating Conditions apply)
15)
I
Symbol
I
I
I
I
I
C
INJ
CPDL
CPDH
LHI
LHA
IL
IO
) will flow if an overload current flows through an adjacent pin. Please refer to
11)
12)
11)
12)
CC –
CC –
Drivers. The limit for pin groups must be respected.
K
OV
Min.
–
120
–
-100
.
58
Limit Values
Max.
10
–
-10
–
±20
10
V
Unit Test Condition
µA
µA
µA
µA
µA
pF
1)
Electrical Parameters
V
DDI
DDI
(cont’d)
is sufficient.
is sufficient.
V
V
V
V
V
0 V <
–
XC161CJ-16F
IN
IN
OUT
DDP
OUT
=
=
Derivatives
V2.4, 2006-08
= 0.5 ×
= 0.45 V
V
V
V
ILmax
IHmin
IN
V
<
OL
I
OV
V
→
.
DDI
V
SS
,