sak-xc161cj-16f40f Infineon Technologies Corporation, sak-xc161cj-16f40f Datasheet - Page 6

• Manufacturer Part Number: sak-xc161cj-16f40f
• Description: 16-bit Single-chip Microcontroller
• Manufacturer: Infineon Technologies Corporation

16-Bit Single-Chip Microcontroller with C166SV2 Core
XC166 Family
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Data Sheet
High Performance 16-bit CPU with 5-Stage Pipeline
– 25 ns Instruction Cycle Time at 40 MHz CPU Clock (Single-Cycle Execution)
– 1-Cycle Multiplication (16 × 16 bit), Background Division (32 / 16 bit) in 21 Cycles
– 1-Cycle Multiply-and-Accumulate (MAC) Instructions
– Enhanced Boolean Bit Manipulation Facilities
– Zero-Cycle Jump Execution
– Additional Instructions to Support HLL and Operating Systems
– Register-Based Design with Multiple Variable Register Banks
– Fast Context Switching Support with Two Additional Local Register Banks
– 16 Mbytes Total Linear Address Space for Code and Data
– 1024 Bytes On-Chip Special Function Register Area (C166 Family Compatible)
16-Priority-Level Interrupt System with 73 Sources, Sample-Rate down to 50 ns
8-Channel Interrupt-Driven Single-Cycle Data Transfer Facilities via
Peripheral Event Controller (PEC), 24-Bit Pointers Cover Total Address Space
Clock Generation via on-chip PLL (factors 1:0.15 … 1:10), or
via Prescaler (factors 1:1 … 60:1)
On-Chip Memory Modules
– 2 Kbytes On-Chip Dual-Port RAM (DPRAM)
– 4 Kbytes On-Chip Data SRAM (DSRAM)
– 2 Kbytes On-Chip Program/Data SRAM (PSRAM)
– 128 Kbytes On-Chip Program Memory (Flash Memory)
On-Chip Peripheral Modules
– 12-Channel A/D Converter with Programmable Resolution (10-bit or 8-bit) and
– Two 16-Channel General Purpose Capture/Compare Units (32 Input/Output Pins)
– Multi-Functional General Purpose Timer Unit with 5 Timers
– Two Synchronous/Asynchronous Serial Channels (USARTs)
– Two High-Speed-Synchronous Serial Channels
– On-Chip TwinCAN Interface (Rev. 2.0B active) with 32 Message Objects
– Serial Data Link Module (SDLM), compliant with J1850, supporting Class 2
– IIC Bus Interface (10-bit addressing, 400 kbit/s) with 3 Channels (multiplexed)
– On-Chip Real Time Clock, Driven by Dedicated Oscillator
Idle, Sleep, and Power Down Modes with Flexible Power Management
Programmable Watchdog Timer and Oscillator Watchdog
Conversion Time (down to 2.55 µs or 2.15 µs)
(Full CAN/Basic CAN) on Two CAN Nodes, and Gateway Functionality
Summary of Features
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V2.4, 2006-08
XC161