w83977ctf Winbond Electronics Corp America, w83977ctf Datasheet - Page 133

• Manufacturer Part Number: w83977ctf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

CRFE, FF (Default 0x00)
Bit 2: COMIRQEN.
Bit 1: GP11IRQEN.
Bit 0: GP10IRQEN.
CRF9 (Default 0x00)
Reserved for Winbond test.
Bit 7 - 3: Reserved. Return zero when read.
Bit 2: SCI_EN: Select the power management events to be either an SCI# OR SMII# interrupt for
Bit 1: FSLEEP: This bit selects the fast expiry time of individual devices
Bit 0: SMISCI_OE: This is the SMI# and SCI# enable bit.
= 0
= 1
= 0
= 1
= 0
= 1
the IRQ events. Note that: this bit is valid only when SMISCI_OE = 1.
= 0
= 1
= 0
= 1
= 0
= 1
disable the generation of an SMI#/SCI# interrupt due to common IRQ function's IRQ.
enable the generation of an SMI#/SCI# interrupt due to common IRQ function's IRQ.
disable the generation of an SMI#/SCI# interrupt due to GP11 interrupt steering's IRQ.
enable the generation of an SMI#/SCI# interrupt due to GP11 interrupt steering's IRQ.
disable the generation of an SMI#/SCI# interrupt due to GP10 interrupt steering's IRQ.
enable the generation of an SMI#/SCI# interrupt due to GP10 interrupt steering's IRQ.
the power management events will generate an SMI# event.
the power management events will generate an SCI# event.
1 second.
8 milli-seconds.
neither SMI# nor SCI# will be generated. Only the IRQ status bit is set.
an SMI# or SCI# event will be generated.
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Publication Release Date: March 1999
W83977EF/ CTF
PRELIMINARY
Revision A1