w83977atf Winbond Electronics Corp America, w83977atf Datasheet - Page 71

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w83977atf

Manufacturer Part Number
w83977atf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet

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4.2 Set0-Legacy/Advanced IR Control and Status Registers
Receiver Buffer Register is read only and Transmitter Buffer Register is write only. When operating
in the PIO mode, the port is used to Receive/Transmit 8-bit data.
When function as a legacy IR, this port only supports PIO mode. If set in the advanced IR mode and
configured as MIR/FIR/Remote IR, this port can support DMA transmission. Two DMA channels can
be used simultaneously, one for TX DMA and the other for RX DMA. Therefore, single DMA channel
is also supported when the bit of D_CHSW (DMA Channel Swap, in Set2.Reg2.Bit3) is set and the
TX/RX DMA channel is swapped. Note that two DMA channels can be defined in configure register
CR2A,
while TX DMA channel is disabled, then the single DMA channel will be selected.
4.2.1 Set0.Reg0 - Receiver/Transmitter Buffer Registers (RBR/TBR) (Read/Write)
Address Offset Register Name
Set
0
1
2
3
4
5
6
7
which selects DMA channel or disables DMA channel. If only RX DMA channel is enabled
0
1
2
3
4
5
6
7
Legacy/Advanced IR Control and Status Registers.
Legacy Baud Rate Divisor Register.
Advanced IR Control and Status Registers.
Version ID and Mapped Control Registers.
Transmitter/Receiver/Timer Counter Registers and IR Control Registers.
Flow Control and IR Control and Frame Status FIFO Registers.
IR Physical Layer Control Registers
Remote Control and IR front-end Module Selection Registers.
UDR/ESCR
RBR/TBR
UCR/SSR
ISR/UFR
HCR
USR
HSR
ICR
Receiver/Transmitter Buffer Registers
Interrupt Control Register
Interrupt Status or IR FIFO Control Register
IR Control or Sets Select Register
Handshake Control Register
IR Status Register
Handshake Status Register
User Defined Register
Sets Description
- 52 -
Register Description
Publication Release Date:April 1998
W83977ATF
PRELIMINARY
Revision 0.52

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