pxb4360f Infineon Technologies Corporation, pxb4360f Datasheet - Page 5

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pxb4360f

Manufacturer Part Number
pxb4360f
Description
Content Addressable Memory Element Came
Manufacturer
Infineon Technologies Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
pxb4360fV1.1
Manufacturer:
INFINEON
Quantity:
12 388
Part Number:
pxb4360fV1.1
Manufacturer:
INFINEON/英飞凌
Quantity:
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Data Sheet
Chipset Configuration for Main ATM Layer Functionality . . . . . . . . . . . . . . . . . . . 7
Chipset Configuration for Main ATM Layer Functionality Plus Full OAM . . . . . . . 8
Chipset Configuration for Main ATM Layer Functionality Plus Full OAM
and Arbitrary Header Translation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Miniswitch Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Line Card Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
CAME Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
CAME Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ALP and CAME Application for 8k Connections . . . . . . . . . . . . . . . . . . . . . . . . . 17
ALP and CAME Application for 16k Connections . . . . . . . . . . . . . . . . . . . . . . . . 18
Block Diagram of the CAME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
State Diagram of Status Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Cascade Interface - Interconnection of 2 CAME Chips . . . . . . . . . . . . . . . . . . . . 46
Clock Interface of the CAME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Example for VBIAS Reference Voltage Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Input/Output Waveform for AC Measurements . . . . . . . . . . . . . . . . . . . . . . . . . . 59
Boundary-Scan Test Interface Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . 60
Example of Execution Timing for Write Command (Request #4) . . . . . . . . . . . . 61
CAME Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
CAME Write Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Timing of Cascade Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Sorts of Packing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
0-5
07.2000

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