pxb4360f Infineon Technologies Corporation, pxb4360f Datasheet - Page 41

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pxb4360f

Manufacturer Part Number
pxb4360f
Description
Content Addressable Memory Element Came
Manufacturer
Infineon Technologies Corporation
Datasheet

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TMODE register use is allowed only if the MODE register is set to the default values mentioned
in
Data Sheet
on page 39. The TMODE register bits cause the following functional changes:
Reserved, do not activate.
000000
Test Write Enable.
Enables writing to all memory banks in parallel. This bit changes a write
request #4 to a “test write” request.
0
Test Read Enable.
Enables parallel reading from all banks at the same offset. This bit changes a
read request #5 to a “test read” request.
0
Test Search Enable.
Enables parallel comparing in all banks. This bit changes a search request #3
to a “test search” request.
0
reserved(4:0)
Default
Default
Default
Default
5-41
TWE
TRE
reserved(5)
TSE
07.2000

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