ncn6001 ON Semiconductor, ncn6001 Datasheet - Page 32

• Manufacturer Part Number: ncn6001
• Description: Compact Smart Card Interface Ic
• Manufacturer: ON Semiconductor

Table of Contents
COMPACT SMART CARD INTERFACE IC
MAXIMUM RATINGS
DIGITAL PARAMETERS SECTION
POWER SUPPLY SECTION
SMART CARD INTERFACE SECTION
PROGRAMMING
STARTUP DEFAULT CONDITIONS
CARD DETECTION
CRD_VCC OPERATION
POWERUP SEQUENCE
POWER DOWN SEQUENCE
DATA I/O LEVEL SHIFTER
GENERAL PURPOSE CRD_C4 and CRD_C8
INTERRUPT
SPI PORT
DC/DC OPERATION
SMART CARD CLOCK DIVIDER
INPUT SHITTY TRIGGERS
SECURITY FEATURES
ESD PROTECTION
PRINTED CIRCUIT BOARD LAY OUT
TEST BOARD SCHEMATIC DIAGRAM
ABBREVIATIONS
DIMENSIONS
Figures Index
Figure 1. Typical Application
Figure 2. Block Diagram
Figure 3. Typical Startup CRD_VCC Sequence
Figure 4. CRD_VCC Typical Rise and Fall Time
Figure 5. Startup Sequence with ATR
Figure 6. Typical Power Down Sequence
Figure 7. Basic I/O Internal Circuit
Figure 8. Typical I/O Rise and Fall Time
Figure 9. Typical CRD_C4 Output Drive and Logic Control
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Figure 10. Basic Interrupt Function
Figure 11. Basic SPI Timings and Protocol
Figure 12. Chip Address Decoding Protocol and MISO
Sequence
Figure 13. Basic Multi Command SPI Bytes
Figure 14. Programming Sequence, Chip Address = $03
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Figure 15. MISO Read Out Sequences
Figure 16. Basic DC/DC Converter
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Figure 17. Theoretical DC/DC Operating Waveforms
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Figure 18. Typical CRD_VCC Ripple Voltage
Figure 19. CRD_VCC Efficiency as a Function of the Input
Supply Voltage
Figure 20. CRD_VCC Efficiency as a Function of the Input
Supply Voltage
Figure 21. Typical Inductor Current
Figure 22. Output Current Limits
Figure 23. Output Current Limit as a Function of the
Temperature
Figure 24. Typical Clock Divider Synchronization
Figure 25. Basic Clock Divider and Level Shifter
Figure 26. Force CRD_CLK to Low
Figure 27. Force CRD_CLK to Active Mode
Figure 28. CRD_CLK Programming
Figure 29. CRD_CLK Operating Low Speed (Top Trace),
Full Speed (Bottom Trace)
Figure 30. Typical Schmitt Trigger Characteristic
Figure 31. NCN6001 Engineering Test Board Schematic
Diagram
Figure 32. NCN6001 Demo Board Printed Circuit Board
Layout
Figure 33. Typical Multiple Parallel Interfaces
Tables Index
DIGITAL PARAMETERS.
POWER SUPPLY.
SMART CARD INTERFACE.
Table 1. WRT_REG Bits Definitions
Table 2. WRT_REG Bits Definitions and Functions
Table 3. MOSI and MISO Bits Identifications and Functions
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Table 4. Startup Default Conditions
Table 5. CRD_VCC Output Voltage Range
Table 6. I/O Pullup Resistor True Table
Table 7. Interrupt Reset Logic
Table 8. Interrupt Reset Logic Operation
Table 9. Ceramic/Electrolytic Capacitors Comparison
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Table 10. Output Clock Rise and Fall Time Selection
Table 11. Demo Board Bill of Material
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