sclt3-8bt8-tr STMicroelectronics, sclt3-8bt8-tr Datasheet - Page 8

• Manufacturer Part Number: sclt3-8bt8-tr
• Description: Protected Digital Input Termination With Serialized State Transfer
• Manufacturer: STMicroelectronics

Functional description
2.3
8/33
Figure 5.
The input digital filter
A digital filter is implemented between the input state comparator and the input state
register. It consists of a 2-step sampling circuit that is controlled by an oscillator as shown on
Figure
The filtering time t
period t
2 x t
t
This period can be adjusted between 20 µs and 3000 µs and is compatible with the
IEC 61131-2 standard as shown on
Table 2.
Being placed in the front end of the module, this filter increases the transient immunity of the
SCLT and its SPI logic circuitry. It also simplifies the input management software task of the
ASIC controller.
CKF
Input frequency
Min. filter time t
OSC resistance
CKF period t
DVR connection
Divider ratio
Input speed
CKF
= Divider ratio x t
6.
CKF
< t
FT
:
CKF
Low side front-end input topology including the ESD surge protection
and the LED driver
Typical setting of the digital filter timings
< 3 x t
FT
FT
CKF
is set by the external oscillator resistor and is a function of the oscillator
OSC
60 kHz
COM
51 kΩ
20 µs
10 µs
(R
8
IN
IN
LD
LD
COM
COM
OSC
S
Doc ID 15191 Rev 3
P
P
)
Fast
Table
2.
20 kHz
150 kΩ
COM
V
V
50 µs
25 µs
R
R
8
S
Medium
230 µs
115 µs
82 kΩ
5 kHz
V
64
DD
Filter
SCLT3-8BT8
1500 µs
1.3 MΩ
300 Hz
3.0 ms
Slow
V
64
DD