lm2502sm National Semiconductor Corporation, lm2502sm Datasheet - Page 18

• Manufacturer Part Number: lm2502sm
• Description: Mobile Pixel Link Mpl Display Interface Serializer And Deserializer
• Manufacturer: National Semiconductor Corporation

www.national.com
Functional Description
For the MOT CPU 68xx mode, the Master accepts data on the CS* Low-to-High transition or the E High-to-Low transition, which
ever come first. The Slave output only uses the CS* pin for data strobe/latch, as the E signal is held constantly High.
CPU MODE — WRITE — i80
T15
T16
No.
No.
T1
T2
T3
T4
T5
T6
T7
T8
T9
MasterOUT
MasterOUT
SlaveOUT
SlaveOUT
SlaveOUT
SlaveOUT
MasterIN
MasterIN
MasterIN
Master
Slave
Recovery Time
INTR Response, (Note 5)
Data Setup before Write* High
Data Hold after Write* High
Write* Recovery Time, (Note 5)
Master Latency
Slave Latency
Data Valid before Write* High-to-Low
WR* Pulse Width Low
Data Valid before Write* Low-to-High
Data Valid after Write* Low-to-High
TABLE 6. READ — 6800 µP Interface Parameters (Continued)
TABLE 7. WRITE — 80xx µP Interface Parameters
(Continued)
Parameter
FIGURE 15. WRITE — 80xx µP Interface
Parameter
18
Min
Min
0
5
5
6
Typ
Typ
5
5
9
1
3
4
1
Max
Max
20093312
MC Cycles
MC Cycles
MC Cycles
MC Cycles
MC Cycles
MC Cycles
MC Cycles
MC Cycles
Units
Units
ns
ns
ns