tda5235 Infineon Technologies Corporation, tda5235 Datasheet - Page 57

• Manufacturer Part Number: tda5235
• Description: Enhanced Sensitivity Double-configuration Receiver With Digital Baseband Processing
• Manufacturer: Infineon Technologies Corporation

Please note that for Data Slicer Bit Mode a special constellation of RUNIN bits and TSI
bits has to be ensured. Further details can be seen at the end of
The two independent correlators can be configured in the x_TSIMODE register to work
in one of the following four TSI modes:
16-Bit Mode: As a single correlator of up to 32 chips
The length of the x_TSILENA register must be set to 16d whenever x_TSILENB is higher
than 0.
Figure 27
8-Bit Parallel Mode: As two correlators of up to 16 chips length each
working simultaneously in parallel
In the following example, TSI Pattern B matches first and generates an FSYNC. The
lengths of both TSI Patterns are now independent from each other. The payload length
for these two TSI Pattern may be different.
Figure 28
Data Sheet
x_TSILENA = 16d, x_TSILENB = 6d
Incoming Pattern
Manchester Coded
TSI Pattern Match
FSYNC
Data into FIFO
x_TSILENA = 16d, x_TSILENB = 6d
Incoming Pattern
Manchester Coded
TSI Pattern B Match
FSYNC
Data into FIFO
16-Bit TSI Mode
8-Bit Parallel TSI Mode
0 0 0 0
RunIn
0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 1 0 0 1 1 0 0 1 0 1 1 0 0 1
0 0 0 0 0 1 0 1 0 1 0 0 1 0
0 1 0 1 0 0 0 1 1 1 1 1 0 1 0 0 1 0
RunIn
0
0 1 0 1 0 1 0 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 1 0 0 1
5 4 3 2 1 0
x_TSIPTB
1 1
0 0
1 1 0 1 1 1 1
57
15
14
0
13121110 9 8
0
5 4 3 2 1 0
x_TSIPTB
1 1
0 0
x_TSIPTA
0 0
1
7
0 1 0 1 1
6
1 0 1 0 0 1 0
5 4 3 2 1 0
0 0
Functional Description
Chapter
1 0 1 0 0 1 0
V1.0, 2010-02-19
2.4.8.4.
TDA5235