qf4a512 ETC-unknow, qf4a512 Datasheet - Page 16

• Manufacturer Part Number: qf4a512
• Description: 4-channel Programmable Signal Converter Psc
• Manufacturer: ETC-unknow

PRELIMINARY
QF4A512
Note: The value in the IGC_SEQADDR registers can set in two ways. By default, if auto_config is not set it will take a value of F00h –
corresponding to the start of User Memory. If auto_config is set it will be written to the value stored in the corresponding EEPROM
address.
The format for the sequences stored in EEPROM is shown in figure 4. The sequences must be in consecutive memory locations and
consist of a series of addresses, each having a 16-bit (i.e 2 byte) value.
The first address, seqstop_addr, is simply the ending address for the sequence and points to the byte immediately following the final
sequence address. This is then followed by a series of sequences, each comprising three addresses. The first address,
seq_eestartaddr, points to the starting address in EEPROM for the block read. The second address, seq_sifstartaddr, points to the
destination starting address for where the block data will be written. The third address, seq_sifendaddr, is the destination ending
address for the data to be written. This will cause the chip to copy a number of bytes, N, starting at address seq_eestartaddr to a block
of registers starting at seq_sifstart_addr and ending at seq_sifendaddr, where seq_sifendaddr = seq_sifstartaddr + N – 1.
Once this transfer is complete the chip will move to the next sequence and perform a similar operation for its specified addresses, until
it reaches seqstop_addr. At this point the chip will return to the corresponding point in the Power Up / Reset flow as shown in figure 3.
5.3 Calibration
One possible use for an Extended Initialization sequence is to transfer calibration values stored in EEPROM to the corresponding gain
and offset calibration registers for each channel. For more information see Section 7.7.
Rev C5, Jan 07
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