sta335bws13tr STMicroelectronics, sta335bws13tr Datasheet - Page 31

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sta335bws13tr

Manufacturer Part Number
sta335bws13tr
Description
2.1-channel 40-watt High-efficiency Digital Audio System Sound Terminal?
Manufacturer
STMicroelectronics
Datasheet

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STA369BWS
6.1.3
Channel input mapping
Table 21.
Each channel received via I
channel input mapping registers. This allows for flexibility in processing. The default settings
of these registers maps each I
Configuration register C (addr 0x02)
FFX power output mode
The FFX power output mode selects how the FFX output timing is configured.
Different power devices use different output modes.
Table 22.
FFX compensating pulse size register
Table 23.
6
7
0
1
2
3
4
5
Bit
Bit
Bit
OCRB
D7
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Channel input mapping
FFX power output mode
FFX compensating pulse size bits
Reserved
D6
0
0
1
1
1
1
1
1
0
RST
RST
RST
C1IM
C2IM
OM0
OM1
CSZ0
CSZ1
CSZ2
CSZ3
CSZ3
D5
2
0
S can be mapped to any internal processing channel via the
Doc ID 16861 Rev 3
2
Name
Name
Name
S input channel to its corresponding processing channel.
CSZ2
D4
1
0: processing channel 1 receives left I
1: processing channel 1 receives right I
0: processing channel 2 receives left I
1: processing channel 2 receives right I
Selects configuration of FFX output:
00: drop compensation
01: discrete output stage: tapered compensation
10: full-power mode
11: variable drop compensation (CSZx bits)
When OM[1,0] = 11, this register determines the
size of the FFX compensating pulse from 0 clock
ticks to 15 clock periods.
CSZ1
D3
0
CSZ0
Description
Description
Description
D2
1
Register description
OM1
D1
1
2
2
S Input
S Input
2
2
S Input
S Input
OM0
D0
1
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