sta335bwsqs13tr STMicroelectronics, sta335bwsqs13tr Datasheet - Page 55

• Manufacturer Part Number: sta335bwsqs13tr
• Description: 2.1-channel, High-efficiency Digital Audio System With Qsound Qhd
• Manufacturer: STMicroelectronics

STA335BWSQS
6.12.17
Note:
Coefficient write/read control register
Coefficients for user-defined EQ, Mixing, Scaling, and Bass Management are handled
internally in the STA335BWSQS via RAM. Access to this RAM is available to the user via an
I
contains a coefficient base address, five sets of three store the values of the 24-bit
coefficients to be written or that were read, and one contains bits used to control the
write/read of the coefficient(s) to/from RAM.
Three different RAM banks are embedded in STA335BWSQS. The three banks are
managed in paging mode using EQCFG register bits. They can be used to store different
EQ settings. For speaker frequency compensation, a sampling frequency independent EQ
must be implemented. Computing 3 different coefficients set for 32 kHz, 44.1kHz, 48 kHz
and downloading them in the 3 RAM banks, it is possible to select the suitable RAM block
depending from the incoming frequency with a simple I
For example, in case of different input sources (different sampling rates), the 3 different set
of coefficients can be downloaded once at the start up, and during the normal play it is
possible to switch among the 3 RAM blocks allowing a faster operation, without any
additional download from the microcontroller.
To write the coefficients in a particular RAM bank, this bank must be selected first writing bit
0 and bit 1 in register 0x31. Then the below write procedure can be used.
Note that as soon as a RAM bank is selected, the EQ settings will be automatically switched
to the coefficients stored in the active RAM block.
The read and write operation on RAM coefficients works only if LRCKI (pin 29) is switching.
Reading a coefficient from RAM
1.
2.
3.
4.
5.
6.
Reading a set of coefficients from RAM
1.
2.
3.
4.
5.
6.
7.
8.
2
C register interface. A collection of I2C registers are dedicated to this function. One
D7
Select the RAM block with register 0x31 bit1, bit0.
Write 6-bits of address to I
Write 1 to R1 bit in I
Read top 8-bits of coefficient in I
Read middle 8-bits of coefficient in I
Read bottom 8-bits of coefficient in I
Select the RAM block with register 0x31 bit1, bit0.
Write 6-bits of address to I
Write 1 to RA bit in I
Read top 8-bits of coefficient in I
Read middle 8-bits of coefficient in I
Read bottom 8-bits of coefficient in I
Read top 8-bits of coefficient b2 in I
Read middle 8-bits of coefficient b2 in I
D6
Reserved
2
2
C address 0x26.
C address 0x26.
D5
2
2
C register 0x16.
C register 0x16.
2
2
C address 0x17.
C address 0x17.
D4
2
2
2
2
2
C address 0x1A.
C address 0x18.
C address 0x18.
C address 0x19.
C address 0x19.
2
C address 0x1B.
RA
D3
0
2
C write operation on register 0x31.
D2
R1
0
Register description
WA
D1
0
W1
D0
0
55/70