sta335bwsqs13tr STMicroelectronics, sta335bwsqs13tr Datasheet - Page 34

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sta335bwsqs13tr

Manufacturer Part Number
sta335bwsqs13tr
Description
2.1-channel, High-efficiency Digital Audio System With Qsound Qhd
Manufacturer
STMicroelectronics
Datasheet
Register description
6.5
6.5.1
6.5.2
6.5.3
6.5.4
34/70
Configuration register E (addr 0x04)
Max power correction variable
Table 35.
Max power correction
Table 36.
Setting the MPC bit turns on special processing that corrects the STA335BWSQS power
device at high power. This mode should lower the THD+N of a full DDX system at maximum
power output and slightly below. If enabled, MPC is operational in all output modes except
tapered (OM[1,0] = 01) and binary. When OCFG = 00, MPC will not effect channels 3 and 4,
the line-out channels.
Noise-shaper bandwidth selection
Table 37.
AM mode enable
Table 38.
STA335BWSQS features a DDX processing mode that minimizes the amount of noise
generated in frequency range of AM radio. This mode is intended for use when DDX is
operating in a device with an AM tuner active. The SNR of the DDX processing is reduced to
approximately 83 dB in this mode, which is still greater than the SNR of AM radio.
Bit
Bit
Bit
Bit
2
3
0
1
SVE
D7
1
RW
RW
RW
RW
RW
RW
RW
RW
MPCV
MPC
NSBW
AME
ZCE
D6
RST
RST
1
0
0
RST
RST
0
1
DCCV
NSBW
D5
Name
Name
0
AME
MPCV
Name
Name
MPC
PWMS
D4
0
1: Third order NS
0: Fourth order NS
0: Normal DDX operation.
1: AM reduction mode DDX operation
0: Use standard MPC coefficient
1: Use MPCC bits for MPC coefficient
1: Enable power bridge correction for THD reduction
near maximum power output.
AME
D3
0
Description
Description
NSBW
Description
Description
D2
0
MPC
D1
1
STA335BWSQS
MPCV
D0
0

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