sab9076h NXP Semiconductors, sab9076h Datasheet - Page 19

• Manufacturer Part Number: sab9076h
• Description: Picture-in-picture Pip Controller
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Additional I
Table 6 Overview of additional I
Note
1. The data bits which are not used should be set to zero.
In Manual mode more PIP modes become available with
the help of register 20H to 32H.
An overview of these I
The meaning and relation of the I
in Fig.8. The background has a fixed size and can be fine
positioned with the BGHFP and BGHFP bits. The shown
PIPs are only for one channel (Main or Sub), the other
channel has the same control and can be displayed at the
same time. The SDHFP and MDHFP bits determine the
most left shown pixel for this channel in 256 steps of
4 pixels. The SDVFP and MDVFP bits determine the most
upper shown line for this channel in 256 steps of 1 line.
The SHPIC and MHPIC bits determine the horizontal
picture size in 256 steps of 4 pixels, the minimum value is
4 pixels. The SVPIC and MVPIC bits determine the vertical
picture size in 256 steps of 1 line, the minimum value is
1 line. The PIP mode is built-up of a maximum of four
horizontal rows. The minimum is one row, more rows can
1996 Aug 13
2AH
2BH
2CH
2DH
2EH
20H
21H
22H
23H
24H
25H
26H
27H
28H
29H
2FH
30H
31H
32H
Picture-In-Picture (PIP) controller
SA
PRIO
MHRPO31
MHRPN31
SHRPO31
SHRPN31
MHDIS07
MHDIS17
MHDIS27
MHDIS37
SHDIS07
SHDIS17
SHDIS27
SHDIS37
MHPIC7
MVPIC7
MVDIS7
SHPIC7
SVPIC7
SVDIS7
2
BIT 7
C-bus settings
2
C-bus registers is given in Table 6.
note 1
MHRPO30
MHRPN30
SHRPO30
SHRPN30
MHDIS06
MHDIS16
MHDIS26
MHDIS36
SHDIS06
SHDIS16
SHDIS26
SHDIS36
MHPIC6
MVPIC6
MVDIS6
SHPIC6
SVPIC6
SVDIS6
BIT 6
2
C-bus registers is shown
2
C-bus sub-addresses
note 1
MHRPO21
MHRPN21
SHRPO21
SHRPN21
MHDIS05
MHDIS15
MHDIS25
MHDIS35
SHDIS05
SHDIS15
SHDIS25
SHDIS35
MHPIC5
MVPIC5
MVDIS5
SHPIC5
SVPIC5
SVDIS5
BIT 5
note 1
MHRPO20
MHRPN20
SHRPO20
SHRPN20
MHDIS04
MHDIS14
MHDIS24
MHDIS34
SHDIS04
SHDIS14
SHDIS24
SHDIS34
MHPIC4
MVPIC4
MVDIS4
SHPIC4
SVPIC4
SVDIS4
BIT 4
DATA BYTE
19
be displayed by setting the Vertical Repetition Rate
Number VRPN bits. The distance between the rows can be
set by SVDIS and MVDIS bits. Every row is built-up of a
maximum of four PIPs. The minimum is one PIP and the
distance between the starting points of those PIPs on a
row is determined by SHDIS and MHDIS bits.
SA 20H
The PRIO bit sets the priority between Main and Sub
channel. If PRIO is set to logic 0, priority is given to the Sub
channel which means that the Sub channel PIPs, if
present, are placed on top of the Main PIPs. If PRIO is set
to logic 1, the Main PIPs are set on top of the Sub PIPs.
The MVRPN and SVRPN bits determine the number of
repeated PIP rows. There is always one row visible of each
channel. If no PIPs should be visible the PIP channel must
be switched off (SA 00, bit 7 or bit 6).
MHRPO11
MHRPN11
SHRPO11
SHRPN11
MHDIS03
MHDIS13
MHDIS23
MHDIS33
MVRPN1
SHDIS03
SHDIS13
SHDIS23
SHDIS33
MHPIC3
MVPIC3
MVDIS3
SHPIC3
SVPIC3
SVDIS3
BIT 3
CONTROL REGISTER
MHRPO10
MHRPN10
SHRPO10
SHRPN10
MHDIS02
MHDIS12
MHDIS22
MHDIS32
MVRPN0
SHDIS02
SHDIS12
SHDIS22
SHDIS32
MHPIC2
MVPIC2
MVDIS2
SHPIC2
SVPIC2
SVDIS2
BIT 2
MHRPO01
MHRPN01
SHRPO01
SHRPN01
MHDIS01
MHDIS21
MHDIS31
MHDIS11
SHDIS01
SHDIS11
SHDIS21
SHDIS31
SVRPN1
MHPIC1
MVPIC1
MVDIS1
SHPIC1
SVPIC1
SVDIS1
Preliminary specification
BIT 1
SAB9076H
MHRPO00
MHRPN00
SHRPO00
SHRPN00
MHDIS00
MHDIS10
MHDIS20
MHDIS30
SHDIS00
SHDIS10
SHDIS20
SHDIS30
SVRPN0
MHPIC0
MVPIC0
MVDIS0
SHPIC0
SVPIC0
SVDIS0
BIT 0