lan9303 Standard Microsystems Corp., lan9303 Datasheet - Page 102

• Manufacturer Part Number: lan9303
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Single Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Revision 1.3 (08-27-09)
7.2.11
7.2.12
7.3
7.3.1
LEDs
Each PHY provides LED indication signals to the GPIO/LED block of the device. This allows external
LEDs to be used to indicate various PHY related functions such as TX/RX activity, speed, duplex, or
link status. Refer to
configuration of these signals.
Required Ethernet Magnetics
The magnetics selected for use with the device should be an Auto-MDIX style magnetic, which is
widely available from several vendors. Please review the SMSC Application note 8.13 “Suggested
Magnetics” for the latest qualified and suggested magnetics. A list of vendors and part numbers are
provided within the application note.
The Virtual PHY provides a basic MII management interface (MDIO) to the MII management pins per
the IEEE 802.3 (clause 22) so that a MAC with an unmodified driver can be supported as if the MAC
was attached to a single port PHY. This functionality is designed to allow easy and quick integration
of the device into designs with minimal driver modifications. The Virtual PHY provides a full bank of
registers which comply with the IEEE 802.3 specification. This enables the Virtual PHY to provide
various status and control bits similar to those provided by a real PHY. These include the output of
speed selection, duplex, loopback, isolate, collision test, and auto-negotiation status. For a list of all
Virtual PHY registers and related bit descriptions, refer to
page
Virtual PHY Auto-Negotiation
The purpose of the auto-negotiation function is to automatically configure the Virtual PHY to the
optimum link parameters based on the capabilities of its link partner. Because the Virtual PHY has no
actual link partner, the auto-negotiation process is emulated with deterministic results.
Auto-negotiation is enabled by setting the
Control Register (VPHY_BASIC_CTRL)
events:
The emulated auto-negotiation process is much simpler than the real process and can be categorized
into three steps:
1. The
2. The
3. The auto-negotiation result (speed, duplex, and pause) is determined and registered.
The auto-negotiation result (speed and duplex) is determined using the Highest Common Denominator
(HCD) of the
Virtual PHY
Power-On Reset (POR)
Hardware reset (nRST)
PHY Software reset (via the
(RESET_CTL), or the
(VPHY_BASIC_CTRL))
Setting the
(VPHY_RST_AN)
Digital Reset (via the
Issuing an EEPROM Loader RELOAD command
(VPHY_BASIC_STATUS).
(VPHY_AN_EXP).
191.
Page Received
Auto-Negotiation Complete
Virtual PHY Auto-Negotiation Advertisement Register (VPHY_AN_ADV)
Virtual PHY Basic Control Register
Chapter 12, "GPIO/LED Controller," on page 132
bit high
Digital Reset (DIGITAL_RST)
Reset (VPHY_RST)
bit is set in the
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Single MII/RMII/Turbo MII
Virtual PHY Reset (VPHY_RST)
DATASHEET
bit is set in the
and is restarted by the occurrence of any of the following
102
Auto-Negotiation (VPHY_AN)
bit of the
Virtual PHY Auto-Negotiation Expansion Register
(VPHY_BASIC_CTRL),
(Section 8.4, "EEPROM Loader," on page
bit of the
Virtual PHY Basic Control Register
Section 13.3.1, "Virtual PHY Registers," on
Virtual PHY Basic Status Register
Reset Control Register
bit of the
for additional information on the
bit of the
Restart Auto-Negotiation
Reset Control Register
SMSC LAN9303/LAN9303i
Virtual PHY Basic
and
(RESET_CTL))
Virtual PHY
Datasheet
113)