adm6999g Infineon Technologies Corporation, adm6999g Datasheet - Page 22

• Manufacturer Part Number: adm6999g
• Description: 8 Port 10/100 Mb/s + Gigabit Single Chip Ethernet Switch Controller
• Manufacturer: Infineon Technologies Corporation

of noise, causing premature end-of-packet detection. The receiving squelch threshold level can be lowered for use
in longer cable applications. This is achieved by setting bit 10 of register address 11
3.2.5
Carrier Sense (CRS) is asserted due to receive activity once valid data is detected via the smart squelch function.
For 10 Mbits/s half duplex operation, CRS is asserted during either packet transmission or reception. For 10
Mbits/s full duplex and repeater mode operations, the CRS is asserted only due to receive activity.
3.2.6
The jabber function monitors the ADM6999G/GX output and disables the transmitter if it attempts to transmit a
longer than legal sized packet. If TXEN is high for greater than 24ms, the 10Base-T transmitter will be disabled.
Once disabled by the jabber function, the transmitter stays disabled for the entire time that the TXEN signal is
asserted. This signal has to be de-asserted for approximately 256 ms (The un-jab time) before the jabber function
re-enables the transmit outputs. The jabber function can be disabled by programming bit 4 of register address 10
to high.
3.2.7
A link pulse is used to check the integrity of the connection with the remote end. If valid link pulses are not received,
the link detector disables the 10Base-T twisted-pair transmitter, receiver, and collision detection functions.
The link pulse generator produces pulses as defined in IEEE 802.3 10Base-T standard. Each link pulse is
nominally 100ns in duration and is transmitted every 16 ms, in the absence of transmit data.
3.2.8
ADM6999G/GX’s 10Base-T transceiver module incorporates an “automatic link polarity detection circuit”. The
inverted polarity is determined when seven consecutive link pulses of inverted polarity or three consecutive
packets are received with inverted end-of-packet pulses. If the input polarity is reversed, the error condition will be
automatically corrected and reported in bit 5 of register 10
3.2.9
The ADM6999G/GX implements a clock synthesizer that generates all the reference clocks needed from a single
external frequency source. The clock source must be a TTL level signal at 25 MHz +/- 50ppm
3.2.10
The Auto Negotiation function provides a mechanism for exchanging configuration information between two ends
of a link segment and automatically selecting the highest performance mode of operations supported by both
devices. Fast Link Pulse (FLP) Bursts provide the signaling used to communicate auto negotiation abilities
between two devices at each end of a link segment. For further details regarding auto negotiation, refer to Clause
28 of the IEEE 802.3u specification. The ADM6999G/GX supports four different Ethernet protocols, so the
inclusion of auto negotiation ensures that the highest performance protocol will be selected based on the ability of
the link partner.
Highest priority relative to the following list:
1. 100Base-TX full duplex (highest priority)
2. 100Base-TX half duplex
3. 10Base-T full duplex
4. 10Base-T half duplex (lowest priority)
Data Sheet
Carrier Sense
Jabber Function
Link Test Function
Automatic Link Polarity Detection
Clock Synthesizer
Auto Negotiation
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Rev 1.31, 2005-11-25
ADM6999G/GX
Descriptions
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