mc33696fje/r2 Freescale Semiconductor, Inc, mc33696fje/r2 Datasheet - Page 32

• Manufacturer Part Number: mc33696fje/r2
• Description: Mc33696 Pll Tuned Uhf Transceiver
• Manufacturer: Freescale Semiconductor, Inc

Configuration, Command, and Status Registers
RSSIE (RSSI Enable) enables the RSSI function.
EDD (Envelop Detector Decay) controls the envelop detector decay.
RAGC (Reset Automatic Gain Control) resets both receiver internal AGCs.
A first SPI access allows RAGC to be set; a second SPI access is required to reset it.
FAGC (Freeze Automatic Gain Control) freezes both receiver AGC levels.
17.3 Frequency Registers
Figure 23
32
Reset Value
Reset Value
Bit Name
Bit Name
0 = Receive mode
1 = Transmit mode
0 = Disabled
1 = Enabled
0 = Slow decay for minimum ripple
1 = Fast decay
0 = No action
1 = Sets the gain to its maximum value
0 = No action
1 = Holds the gain at its current value
and
Figure 24
Bit 15
FSK3
Bit 7
F7
0
0
define the Frequency registers, F and FT.
Bit 14
FSK2
Bit 6
F6
1
0
Bit 13
FSK1
Bit 5
F5
0
0
MC33696 Data Sheet, Rev. 9
Figure 23. F Register
Bit 12
FSK0
Bit 4
F4
0
0
Bit 11
Bit 3
F11
F3
1
0
Bit 10
Bit 2
F10
F2
0
0
Bit 9
Bit 1
F9
F1
0
0
Freescale Semiconductor
Bit 8
Bit 0
F8
F0
0
0
Addr
$04
$05