sc18is602 NXP Semiconductors, sc18is602 Datasheet - Page 12

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sc18is602

Manufacturer Part Number
sc18is602
Description
Sc18is602/sc18is603 I?c-bus To Spi Bridge
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
SC18IS602_603_3
Product data sheet
7.1.11.3 Input-only configuration
7.1.11.4 Push-pull output configuration
The input-only pin configuration is shown in
also has a glitch suppression circuit.
The push-pull output configuration has the same pull-down structure as both the
open-drain and the quasi-bidirectional output modes, but provides a continuous strong
pull-up when the port latch contains a logic 1. The push-pull mode may be used when
more source current is needed from a pin output.
The push-pull pin configuration is shown in
A push-pull pin has a Schmitt-triggered input that also has a glitch suppression circuit.
Fig 17. Open-drain output configuration
Fig 18. Input-only configuration
Fig 19. Push-pull output configuration
pin latch data
Rev. 03 — 13 August 2007
pin latch data
input data
input data
input data
V
SS
Figure
Figure
glitch rejection
N
P
V
SS
glitch rejection
strong
19.
18. It is a Schmitt-triggered input that
V
DD
glitch rejection
002aab884
GPIO pin
SC18IS602/603
002aab885
GPIO pin
I
002aab883
GPIO pin
2
C-bus to SPI bridge
© NXP B.V. 2007. All rights reserved.
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