adav804 Analog Devices, Inc., adav804 Datasheet - Page 27

• Manufacturer Part Number: adav804
• Description: Audio Codec For Recordable Dvd
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
then sends a second frame telling the ADAV804 which register
is required to be written to. The 7 bit register address is left
shifted to make the 8 bits that the frame requires. Another ACK
is issued by the ADAV804. Finally the user can send another
frame with the 8 data bits required to be written to the register.
A third ACK is issued by the ADAV804 after which the user can
send a STOP condition to complete the data transfer.
A read operation requires that the user first write to the
ADAV804 to point to the correct register and then read the
data. This is achieved by sending a START condition followed
Block Reads and Writes
The ADAV804 provides the user with the ability to write to or
read from a block of registers in one continuous operation. To
use this feature the user simply has to continue providing data
frames before the STOP condition. For a write operation the
Register Address is automatically incremented with each
additional frame and the register data is written to that register
(Continued)
(Continued)
SDA
SCL
SCK
SDA
REPEATED START
START BY
MASTER
SCL
SDA
START BY
BY MASTER
MASTER
0
0
0
0
0
0
1
CHIP ADDRESS BYTE
1
1
CHIP ADDRESS BYTE
CHIP ADDRESS BYTE
0
FRAME 1
0
0
FRAME 3
FRAME 1
Figure 39. Reading From the DAC Leeft VolumeRegister in I
0
0
0
(CONTINUED)
(CONTINUED)
AD1
SDA
Figure 38. Writing to the ADAV804 inI
AD1
SCK
AD1
AD0
AD0
AD0
Rev. Pr G | Page 27 of 54
R/W
R/W
R/W
ADAV803
ADAV803/4
ACK. BY
ADAV803/4
ACK. BY
ACK. BY
D7
by the device address frame, with R/W low, and then the register
address frame. Following the ACK from the ADAV804 the user
must issue a REPEATED START condition. This is identical to a
START condition. The next frame is the device address with
R/W set high. On the next frame the ADAV804 will output the
register data on the SDA line. A STOP condition completes the
read operation. Figure 38 and Figure 39 show examples of
writing to and reading from the DAC Left Volume Register
(address = 0b1101000)
address. For a read operation the Register Address is
automatically incremented with each additional frame and the
register data is clocked out on that frame. Care should be
exercised when using the block read or block write modes. For
most cases block reading, or writing to, a register will
automatically increment the register address to point to the next
register. The exceptions to this case are the indirect memory
address registers, Transmitter User Bit and Receiver User Bit
D 6
1
D7
1
D5
1
D 6
1
2
C
DATA BYTE TO
D4
0
D5
REGISTER ADDRESS BYTE
FRAME 3
ADAV803
0
REGISTER ADDRESS BYTE
D3
1
D4
REGISTER DATA
2
1
C
FRAME 2
FRAME 4
FRAME 2
D2
0
D3
0
D1
0
D2
0
D0
0
D1
0
ADAV803
ACK. BY
X
D0
X
ADAV803
ADAV803
ACK. BY
ACK. BY
ADAV803
ACK. BY
STOP BY
MASTER
ADAV804
STOP BY
MASTER