gc80c520g CORERIVER Semiconductor, gc80c520g Datasheet - Page 29

• Manufacturer Part Number: gc80c520g
• Description: Eprom / Rom / Romless Based 8-bit Turbo Microcontrollers
• Manufacturer: CORERIVER Semiconductor

1. 16-bit Auto-reload
2. 16-bit Capture
3. Baudrate Generator
4. Programmable Clock Out
[RCLK+TCLK=0, CP/RL2=0, T2OE=0]
[RCLK+TCLK=0, CP/RL2=1, T2OE=0]
[RCLK+TCLK=1, CP/RL2=X, T2OE=X]
[RCLK+TCLK=X, CP/RL2=0, T2OE=1]
T2CON (C8h) : Timer 2 Control Register
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
6.9. Timer/Counter : Timer 2
Compatible with traditional 80C52 Timer/Counter 2 function
Up or down counting selectable by a software
Time base is selectable by S/W : 4 clocks or 12 clocks
TF2
TF2
EXF2
RCLK
TCLK
EXEN2
TR2
C/T2
CP/RL2
EXF2
: Timer 2 Overflow Flag
: Timer 2 External Flag
: Receive Clock Flag
: Transmit Clock Flag
: Timer 2 External Enable Flag
: Timer 2 Run Control
: Timer or Counter Selection. If C/T2=0, Timer Operation.
: Capture/Reload Flag.
CP/RL2=0, Reload.
CP/RL2=1, Capture. (RCAP2H, RCAP2L)
RCLK
TCLK
EXEN2
(TH2,TL2)
16-bit Timer/Counter
With Automatic Reload
16-bit Timer/Counter with Capture
Baudrate Generation
Clock-out on P1.0
* Timer 2 Interrupt Disable
(TH2, TL2
(RCAP2H, RCAP2L
TR2
(RCAP2H, RCAP2L)
C/T2
RCAP2H, RCAP2L)
CP/RL2
(TH2,TL2)
TH2, TL2 )
CKCON (8Eh) : Clock Control Register
T2MOD (C9h) : Timer 2 Mode Register
TL2 (CCh) : Timer 2 Low Byte Register
TH2 (CDh) : Timer 2 High Byte Register
RCAP2L (CAh) : Timer 2 Capture/Reload Low Byte Register
RCAP2H (CBh) : Timer 2 Capture/Reload High Byte Register
RCAP2H.7 RCAP2H.6 RCAP2H.5 RCAP2H.4 RCAP2H.3 RCAP2H.2 RCAP2H.1 RCAP2H.0
RCAP2L.7 RCAP2L.6 RCAP2L.5 RCAP2L.4 RCAP2L.3 RCAP2L.2 RCAP2L.1 RCAP2L.0
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0) R/W(0)
TH2.7
TL2.7
WD1
-
T2M : Timer 2 Clock Time-base Selection
T2OE : Timer 2 Clock Output to P1.0
DCEN : Timer 2 Down Count Enable
TH2.6
TL2.6
WD0
T2M=1, Time-base is 4 clocks not 12clocks.
-
TH2.5
TL2.5
T2M
-
MiDAS1.0 Family
TH2.4
TL2.4
T1M
-
TH2.3
TL2.3
T0M
-
TH2.2
TL2.2
-
-
R/W(0) R/W(0)
TH2.1
T2OE
TL2.1
-
TH2.0
DCEN
TL2.0
-
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