mpc8306 Freescale Semiconductor, Inc, mpc8306 Datasheet - Page 4

no-image

mpc8306

Manufacturer Part Number
mpc8306
Description
Powerquicc Ii Pro Integrated Communications Processor Family Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
mpc8306CVMABDCA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mpc8306CVMACDCA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mpc8306CVMADDCA
Manufacturer:
MAXIM
Quantity:
1 560
Part Number:
mpc8306CVMADDCA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mpc8306CVMAFDCA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mpc8306SCVMABDCA
Manufacturer:
FREESCAL
Quantity:
513
Part Number:
mpc8306SCVMABDCA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
mpc8306SCVMABDCA
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mpc8306SCVMADDCA
Manufacturer:
FREESCAL
Quantity:
642
Part Number:
mpc8306SCVMAFDCA
Manufacturer:
FREESCALE
Quantity:
20 000
Part Number:
mpc8306VMADDCA
Manufacturer:
FREESCALE
Quantity:
101
Overview
4
MPC8306 PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 2
For more information on QUICC Engine sub-modules, see QUICC Engine Block Reference
Manual with Protocol Interworking.
DDR SDRAM memory controller
— Programmable timing supporting DDR2 SDRAM
— Integrated SDRAM clock generation
— 16-bit data interface, up to 266-MHz data rate
— 14 address lines
— The following SDRAM configurations are supported:
— Support for up to 16 simultaneous open pages for DDR2
— One clock pair to support up to 4 DRAM devices
— Supports auto refresh
— On-the-fly power management using CKE
Enhanced local bus controller (eLBC)
— Multiplexed 26-bit address and 8-/16-bit data operating at up to 66 MHz
— Eight chip selects supporting eight external slaves
— Supports boot from parallel NOR Flash and parallel NAND Flash
— Supports programmable clock ratio dividers
— Up to eight-beat burst transfers
— 16- and 8-bit ports, separate LWE for each 8 bit
— Three protocol engines available on a per chip select basis:
— Variable memory block sizes for FCM, GPCM, and UPM mode
— Default boot ROM chip select with configurable bus width (8 or 16)
— Provides two Write Enable signals to allow single byte write access to external 16-bit eLBC
Integrated programmable interrupt controller (IPIC)
— Functional and programming compatibility with the MPC8260 interrupt controller
— Support for external and internal discrete interrupt sources
– Asynchronous HDLC (bit rate up to 2 Mbps)
– Two TDM interfaces supporting up to 128 QUICC multichannel controller channels, each
– Up to two physical banks (chip selects), 256-Mbyte per chip select for 16 bit data interface.
– 64-Mbit to 2-Gbit devices with x8/x16 data ports (no direct x4 support)
– One 16-bit device or two 8-bit devices on a 16-bit bus,
– Four chip selects dedicated
– Four chip selects offered as multiplexed option
– General-purpose chip select machine (GPCM)
– Three user programmable machines (UPMs)
– NAND Flash control machine (FCM)
slave devices
running at 64 kbps
Freescale Semiconductor

Related parts for mpc8306