mc68hc912bl16 Freescale Semiconductor, Inc, mc68hc912bl16 Datasheet - Page 84

• Manufacturer Part Number: mc68hc912bl16
• Description: 16-bit Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

TC7 — Timer Input Capture/Output Compare Register 7
PACTL — Pulse Accumulator Control Register
PAEN — Pulse Accumulator System Enable
PAMOD — Pulse Accumulator Mode
PEDGE — Pulse Accumulator Edge Control
CLK1, CLK0 — Clock Select Register
84
RESET:
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value
of the free-running counter when a defined transition is sensed by the corresponding input capture edge
detector or to trigger an output action for output compare.
Read anytime. Write anytime for output compare function. Writes to these registers have no meaning
or effect during input capture. All timer input capture/output compare registers are reset to $0000.
Read or write anytime.
PAEN is independent from TEN.
For PAMOD = 0 (event counter mode)
For PAMOD = 1 (gated time accumulation mode)
If the timer is not active (TEN = 0 in TSCR), there is no 64 clock since the E
by the timer prescaler.
0 = Pulse accumulator system disabled
1 = Pulse accumulator system enabled
0 = Event counter mode
1 = Gated time accumulation mode
0 = Falling edges on the pulse accumulator input pin (PT7/PAI) cause the count to be incremented
1 = Rising edges on the pulse accumulator input pin cause the count to be incremented
0 = Pulse accumulator input pin high enables E 64 clock to pulse accumulator and the trailing fall-
1 = Pulse accumulator input pin low enables E 64 clock to pulse accumulator and the trailing rising
ing edge on the pulse accumulator input pin sets the PAIF flag.
edge on the pulse accumulator input pin sets the PAIF flag.
Bit 15
Bit 7
Bit 7
Bit 7
0
0
Port T[6] is not bonded to any pin in MC68HC912BL16.
CLK1
0
0
1
1
PAEN
14
6
6
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
CLK0
0
1
0
1
PAMOD
13
5
5
5
0
Go to: www.freescale.com
Table 28 Clock Selection
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Use PACLK/256 as timer counter clock frequency
Use PACLK/65536 as timer counter clock frequency
PEDGE
12
4
4
4
0
NOTE
CLK1
11
Selected Clock
3
3
3
0
CLK0
10
2
2
2
0
PAOVI
1
9
1
1
0
MC68HC912BL16TS/D
64 clock is generated
MC68HC912BL16
Bit 0
Bit 8
Bit 0
Bit 0
PAI
0
$009E–$009F
$00A0