mc68hc912bl16 Freescale Semiconductor, Inc, mc68hc912bl16 Datasheet - Page 115

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mc68hc912bl16

Manufacturer Part Number
mc68hc912bl16
Description
16-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
TARGET MCU
MC68HC912BL16TS/D
(TARGET MCU)
SPEEDUP PULSE
SPEEDUP
BKGD PIN
BKGD PIN
DRIVE TO
E CLOCK
(TARGET
TARGET MCU
Figure 29 shows the host receiving a logic one from the target MC68HC912BL16 MCU. Since the host
is asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge
on BKGD to the perceived start of the bit time in the target MCU. The host holds the BKGD pin low long
enough for the target to recognize it (at least two target E cycles). The host must release the low drive
before the target MCU drives a brief active-high speed-up pulse seven cycles after the perceived start
of the bit time. The host should sample the bit level about ten cycles after it started the bit time.
Figure 30 shows the host receiving a logic zero from the target MC68HC912BL16 MCU. Since the host
is asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge
START OF BIT TIME
PULSE
E CLOCK
DRIVE AND
HOST
MCU)
START OF BIT
BKGD PIN
BKGD PIN
DRIVE TO
PERCEIVED
HOST
PERCEIVED
TIME
Figure 29 BDM Target to Host Serial Bit Timing (Logic 1)
Figure 30 BDM Target to Host Serial Bit Timing (Logic 0)
HIGH-IMPEDANCE
Freescale Semiconductor, Inc.
For More Information On This Product,
R-C RISE
10 CYCLES
10 CYCLES
Go to: www.freescale.com
10 CYCLES
10 CYCLES
HOST SAMPLES
HIGH-IMPEDANCE
HIGH-IMPEDANCE
HOST SAMPLES
BKGD PIN
BKGD PIN
SPEEDUP PULSE
HIGH-IMPEDANCE
HC12A4 BDM TARGET TO HOST TIM 0
HC12A4 BDM TARGET TO HOST TIM 1
EARLIEST
START OF
NEXT BIT
EARLIEST
START OF
NEXT BIT
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