mc68hc908ap8cfa Freescale Semiconductor, Inc, mc68hc908ap8cfa Datasheet - Page 264

• Manufacturer Part Number: mc68hc908ap8cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

Input/Output (I/O) Ports
DDRA[7:0] — Data Direction Register A Bits
Figure 16-4
When DDRAx is a logic 1, reading address $0000 reads the PTAx data latch. When DDRAx is a logic 0,
reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
Table 16-2
262
These read/write bits control port A data direction. Reset clears DDRA[7:0], configuring all port A pins
as inputs.
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
summarizes the operation of the port A pins.
shows the port A I/O logic.
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
DDRA
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Bit
0
1
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
PTA Bit
X
X
(1)
I/O Pin Mode
Input, Hi-Z
MC68HC908AP Family Data Sheet, Rev. 4
Table 16-2. Port A Pin Functions
RESET
Figure 16-4. Port A I/O Circuit
Output
(2)
Accesses to DDRA
NOTE
DDRAx
PTAx
Read/Write
DDRA[7:0]
DDRA[7:0]
PTA[7:0]
Read
Pin
Accesses to PTA
PTA[7:0]
PTA[7:0]
Write
Freescale Semiconductor
PTAx
(3)