mc68hc908ap8cfa Freescale Semiconductor, Inc, mc68hc908ap8cfa Datasheet - Page 118

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mc68hc908ap8cfa

Manufacturer Part Number
mc68hc908ap8cfa
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
V
V
1. PTA0 = 1 if serial communication; PTA0 = 0 if parallel communication
2. External clock is derived by a 32.768kHz crystal or a 4.9152/9.8304MHz off-chip oscillator.
3. Monitor mode entry by IRQ1= V
IRQ1
GND
GND
GND
TST
TST
V
V
V
or
X
or
DD
DD
DD
passed.
(3)
(3)
GND
V
V
V
V
RST
V
V
V
V
V
or
TST
or
TST
TST
or
TST
DD
DD
DD
DD
DD
Not Blank
Address
"$FFFF"
"$FFFF"
"$FFFF"
$FFFE/
$FFFF
Blank
Blank
Blank
X
X
X
PTA2
X
X
X
X
X
0
0
Table 8-1. Monitor Mode Signal Requirements and Options
TST
PTA1
, a 4.9152/9.8304 MHz off-chip oscillator must be used. The MCU internal crystal oscillator circuit is by-
X
X
X
X
X
1
1
PTA0
(1)
X
X
X
1
1
1
1
PTB0
X
X
X
X
X
0
1
External
Clock
4.9152
9.8304
9.8304
32.768
MHz
MHz
MHz
kHz
X
X
X
(2)
Frequency
2.4576
2.4576
2.4576
2.4576
MHz
MHz
MHz
MHz
Bus
0
OFF
OFF
OFF
OFF
OFF
PLL
ON
X
Disabled
Disabled
Disabled
Disabled
Disabled
Enabled
Enabled
COP
Baud
Rate
9600
9600
9600
9600
0
No operation until
reset goes high
PTA1 and PTA2
voltages only
required if
IRQ1 = V
PTB0 determines
frequency divider
PTA1 and PTA2
voltages only
required if
IRQ1 = V
PTB0 determines
frequency divider
External frequency
always divided by 4
PLL enabled
(BCS set)
in monitor mode
Enters user
mode — will
encounter an illegal
address reset
Enters user mode
Comment
TST
TST
;
;

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