mc68hc908ap8cfa Freescale Semiconductor, Inc, mc68hc908ap8cfa Datasheet - Page 111

• Manufacturer Part Number: mc68hc908ap8cfa
• Description: M68hc08 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

A break interrupt during stop mode sets the SIM break stop/wait bit (SBSW) in the SIM break status
register (SBSR).
The SIM counter is held in reset from the execution of the STOP instruction until the beginning of stop
recovery. It is then used to time the recovery period.
7.7 SIM Registers
The SIM has three memory-mapped registers:
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INT/BREAK
SIM Break Status Register
SIM Reset Status Register
SIM Break Flag Control Register
ICLK
IAB
To minimize stop current, all pins configured as inputs should be driven to
a logic 1 or logic 0.
CPUSTOP
NOTE: Previous data can be operand data or the STOP opcode, depending on the last
Figure 7-19. Stop Mode Recovery from Interrupt or Break
R/W
IDB
IAB
instruction.
STOP ADDR
STOP +1
Figure 7-18. Stop Mode Entry Timing
PREVIOUS DATA
MC68HC908AP Family Data Sheet, Rev. 4
(SBSR) — $FE00
(SRSR) — $FE01
(SBFCR) — $FE03
STOP ADDR + 1
STOP + 2
STOP RECOVERY PERIOD
NOTE
NEXT OPCODE
Figure 7-18
STOP + 2
SAME
shows stop mode entry timing.
SP
SAME
SP – 1
SAME
SAME
SP – 2
SIM Registers
SP – 3
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