cp3bt26y98nepx National Semiconductor Corporation, cp3bt26y98nepx Datasheet - Page 74
cp3bt26y98nepx
Manufacturer Part Number
cp3bt26y98nepx
Description
Reprogrammable Connectivity Processor With Bluetooth-r, Usb, And Can Interfaces
Manufacturer
National Semiconductor Corporation
Datasheet
1.CP3BT26Y98NEPX.pdf
(280 pages)
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15.0 Bluetooth Controller
The integrated hardware Bluetooth Lower Link Controller
(LLC) complies to the Bluetooth Specification Version 1.1
and integrates the following functions:
! 4.5K-byte dedicated Bluetooth data RAM
! 1K-byte dedicated Bluetooth Sequencer RAM
! Support of all Bluetooth 1.1 packet types
! Support for fast frequency hopping of 1600 hops/s
! Access code correlation and slot timing recovery circuit
! Power Management Control Logic
! BlueRF-compatible interface to connect with National’s
For a detailed description of the interface to the LMX5252,
consult the LMX5252 data sheet which is available from the
National Semiconductor wireless group. National provides
software libraries for using the Bluetooth LLC. Documenta-
tion for the software libraries is also available from National
Semiconductor.
15.1
The CP3BT26 interfaces to the LMX5251 or LMX5252 radio
chips though the RF interface.
Figure 14 shows the interface between the CP3BT26 and
the LMX5251 radio chip.
LMX5252 and other RF transceiver chips
CP3BT26
RF INTERFACE
Figure 14. LMX5251 Interface
LMX5251
74
Figure 15 shows the interface between the CP3BT26 and
the LMX5252 radio chip.
The CP3BT26 implements a BlueRF-compatible interface,
which may be used with other RF transceiver chips.
15.1.1
The RF interface signals are grouped as follows:
! Modem Signals (BBCLK, RFDATA, and RFSYNC)
! Control Signal (RFCE)
! Serial Interface Signals (SCLK, SDAT, and SLE)
! Bluetooth
X1CKI/BBCLK
The X1CKI/BBCLK pin is the input signal for the 12-MHz
clock signal. The radio chip uses this signal internally as the
12× oversampling clock and provides it externally to the
CP3BT26 for use as the Main Clock.
RFDATA
The RFDATA signal is the multiplexed Bluetooth data re-
ceive and transmit signal. The data is provided at a bit rate
of 1 Mbit/s with 12× oversampling, synchronized to the 12
MHz BBCLK. The RFDATA signal is a dedicated RF inter-
face pin. This signal is driven to a logic high level after reset.
RFSYNC
In receive mode (data direction from the radio chip to the
CP3BT26), the RFSYNC signal acts as the frequency cor-
rection/DC compensation circuit control output to the radio
chip. The RFSYNC signal is driven low throughout the cor-
relation phase and driven high when synchronization to the
received access code is achieved.
In transmit mode (data direction from the CP3BT26 to the
radio chip), the RFSYNC signal enables the RF output of
the radio chip. When the RFSYNC pin is driven high, the RF
BTSEQ2, and BTSEQ2)
CP3BT26
RF Interface Signals
Figure 15. LMX5252 Interface
Sequencer
Status
Signals
LMX5252
(BTSEQ1,
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