ml674000 Oki Semiconductor, ml674000 Datasheet
ml674000
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ml674000 Summary of contents
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... D S ATA HEET General Purpose Microcontroller ML674000 ® 32-Bit ARM -Based December 2002 ...
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Document Reference: PEDL674000-02.1 12/10/02 ...
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... MCUs for general-purpose applications that require 32-bit CPU performance and low cost afforded by MCU integrated features. Oki Semiconductor’s ML674000 MCU provides a host of useful peripherals such as 8KB of on-board SRAM, timers, watchdog timer, pulse-width modulators, AD converter, UART’s, GPIO connectivity capability, and external memory controller ...
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... Barrel shifter and multiplier (32 bit x 8 bit) Little endian On-chip debug and in-circuit-emulation (ICE) ROM (Flash MBytes SRAM MBytes DRAM MBytes (SDRAM and EDO DRAM support) External IO devices MBytes x 2 banks (with wait control by external signal). Programmable wait setting by each bank. ML674000 2/22 ...
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... DRAMC DMAC I RC APB Br idg APB bus TMR 6ch 2ch WD T UART ( 1655 0 ) A/D GPI O ML674000 PIOA[14:10]/XA[23:19] XA[18:0] XD[15:0] PIOA[15]/XWR XOE_N XBWE_N[1:0] XROMCS_N XRAMCS_N XIOCS_N[0] XIOCS_N[1] XBS_N[1:0] PIOB[8]/XWAIT PIOB[9]/XCAS_N PIOB[10]/XRAS_N PIOB[11]/XSDCLK PIOB[12]/XSDCS_N ...
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... XBS_N[0] 119 XBS_N[1] 120 XWAIT PIOB[8] 121 XCAS_N PIOB[9] 122 XRAS_N PIOB[10] 123 XSDCLK PIOB[11] 124 XSDCS_N PIOB[12] 125 XSDCKE PIOB[13] 126 VDD_IO 127 128 GND_IO 128-Pin Plastic TQFP ML674000 (Primary (Secondary function) function) 64 XD[14] 63 XD[13] 62 XD[12] 61 VDD_IO 60 XD[11] 59 XD[10] 58 XD[9] 57 XD[8] 56 GND_IO 55 XD[7] 54 XD[6] ...
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... PIOA[2]/ PIOA[5]/ VDD_ TCK CTS DTR CORE PIOA[3]/ PIOA[6]/ GND_ TDO DSR RTS CORE PIOA[1]/ PIOA[4]/ TBE NC SOUT DCD PIOA[0]/ PIOA[7]/ TMS VREF SIN Note: NC pins should remain unconnected. 144-Pin Plastic LFBGA ML674000 XA[5] XA[2] GND_IO XD[15] XA[7] XA[4] XA[1] NC XD[14] XA[3] XA[0] NC VDD_IO XD[13] XA[6] XD[12] XD[10] GND_IO XD[11] XD[7] XD[9] XD[5] XD[8] XD[3] XD[2] XD[4] XD[6] ...
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... RTS RI — — — — — — — — — — — — — — — — ML674000 Secondary Function I/O Function O I/O mask/CAS (MSB) O I/O mask/CAS (LSB) — — — — — — — — I UART Serial Data In O UART Serial Data Out I ...
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... ML674000 Secondary Function I/O Function O SIO transmit data output I SIO receive data input — — — — — — — — — — — ...
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... XA[19] XA[20] XA[21] — XA[22] XA[23] XWR — — — — — — — — — — DREQ0 DREQCLR0 — ML674000 Secondary Function I/O Function — — — — — — — — — — — — — — — O External address output O External address output O External address output — ...
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... PWMOUT0 PWMOUT1 — — XWAIT XCAS_N XRAS_N XSDCLK XSDCS_N XSDCKE — — ML674000 Secondary Function I/O Function I DMA request signal ( DREQ clear signal ( DMA Termination Signal ( DMA Termination Signal (CH 1) — O PWM output ( PWM output (Ch 1) — ...
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... Not available for use as port pins when secondary functions are in use. PIOB[15:0] I/O Note that enabling DRAM controller with MODE[2:0] inputs permanently configures PIOB[15:9] for their secondary functions, making them unavailable for use as port pins. Description ML674000 Primary/ Logic Secondary — Negative — ...
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... XDQM[1]/ Connected to SDRAM: DQM (MSB) O XCAS_N[1] Connected to EDO DRAM: column address strobe signal (MSB) XDQM[0]/ Connected to SDRAM: DQM (LSB) O XCAS_N[0] Connected to EDO DRAM: column address strobe signal (LSB) Description ML674000 Primary/ Logic Secondary Secondary Positive — Positive — Positive — Negative — ...
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... RTS O Bit 1 in modem control register controls this output. Ring Indicator Indicates that modem or data set has received telephone ring indicator. Bit 6 in modem status register reflects this input. Description ML674000 Primary/ Logic Secondary Secondary Positive Secondary Positive Secondary Positive ...
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... MODE[2:0] I Operating mode control signals Power supplies VDD_CORE — Core power supply VDD_IO — I/O power supply GND_CORE — Core ground GND_IO — I/O ground Description ML674000 Primary/ Logic Secondary Secondary Positive Secondary Positive — — — — — — — — — ...
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... Fast interrupt input (FIQ) and interrupt input (IRQ) are used as interrupt input signals of ARM core. The interrupt controller controls these interrupt signals to the ARM core. (1) Interrupt sources of ML674000 FIQ: 1 source, external source (external pin: EFIQ_N) IRQ: 23 sources, internal sources: 19, external sources: 4 (external pins: EXINT[3:0]) (2) Interrupt priority level Priority can be set in 8 levels for each source ...
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... Interrupt request is generated in CPU after the end of DMA transfers for the set number of transfer cycles or after occurrence of error. Interrupt request signal is output separately for each channel. Interrupt request signal output can be masked for each channel. Bus request signal is asserted until all transfers of transfer cycles are complete. CPU starts DMA transfer. channel. ML674000 15/22 ...
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... Stops the clock of entire MCU. STANDBY mode setting: Specified by the system control register. STANDBY mode cancelling: Reset, external interrupt (other than FIQ) Byte write (can be written only by IF equivalent to SRAM). Simultaneous connections to EDO-DRAM and SDRAM are not supported. XWAIT (IO bank 0 only) ML674000 16/22 ...
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... REF REF VDD DD_IO DDH OSC V = 2.25 to 2.75 DD_CORE f OSC [ 3.0 to 3.6 DD_IO Ta — ML674000 Rating Unit –0.3 to +3.6 –0.3 to +4.6 –0 +0.3 DD_IO V –0 +0.3 DD_IO –0 +0.3 DD_IO –0 +0.3 and DD_IO –0 +0.3 DD –0 REF –10 to +10 ...
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... LO O DD_IO C — — — IO Analog-to-digital [5] converter operative I REF Analog-to-digital converter stopped [ 25° MHz OSC ML674000 = 3 –40 to +85°C) DD_IO Typical Maximum 2.0 — V +0.3 DD_IO –0.3 — 0.8 — 1.6 2.1 0.7 1.1 — 0.4 0.5 — –0.2 — — DD 2.4 — ...
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... DD_CORE 30 V =2.25 V DD_CORE f=16 MHz 25 CL=50pF 20 V =2.75 V DD_CORE V =2 DD_CORE V =2.25 V DD_CORE 100 -50 ML674000 I -f DD_IO V DD_IO V DD_IO V DD_IO (MHz) I -Ta DD_IO V =3.6 V DD_IO V =3.3 V DD_IO DD_IO - 100 Ta (° ...
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... Symbol Conditions Minimum n — Analog input source E D impedance — CONV — ML674000 ( DD_CORE DD_IO Typical Maximum Unit — — 10 bit — ±3 — — ±3 — LSB — ±3 — ...
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... Oki Semiconductor PACKAGE DIMENSIONS TQFP128-P-1414-0.40-K Mirror finish 5 (Unit : mm) Package material Epoxy resin Lead frame material 42 alloy Pin treatment Solder plating (≥5µm) Package weight (g) 0.55 TYP. Rev. No./Last Revised 1/Nov. 18, 1999 ML674000 21/22 ...
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... The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact an Oki sales person for the product name, package name, pin number, package code, and desired mounting conditions (reflow method, temperature and times). ML674000 22/22 ...
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... The values of Zero scale error and Full scale error Analog-to-Digital converter are corrected. – 23 Add Package Dimensions for LFBGA package. Description enhancement, addition of Features and 1 1 Applications sections Enhancement and name change of Specification 1 2 Overview section Miscellaneous non-technical or typographical – – enhancements. ML674000 Description 23/22 ...
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... Oki Semiconductor Notes: ML674000 24/22 ...
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... Oki Semiconductor reserves the right to make changes in specifications at anytime and without notice. This information furnished by Oki Semiconductor in this publication is believed to be accurate and reliable. However, no responsibility is assumed by Oki Semiconductor for its use; nor for any infringements of patents or other rights of third parties resulting from its use. No license is granted under any patents or patent rights of Oki Semiconductor. ...
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R EGIONAL Semiconductor Products Northwest Area 785 N. Mary Avenue Sunnyvale, CA 94085 Tel: 408/720-1900 Fax: 408/720-8965 Northeast Area Shattuck Office Center 138 River Road Andover, MA 01810 Tel: 978/688-8687 617/489-3092 Fax: 978/688-8896 North Central Area 300 Park Blvd., Suite ...