xc2v1000-4fg256c Xilinx Corp., xc2v1000-4fg256c Datasheet - Page 78

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xc2v1000-4fg256c

Manufacturer Part Number
xc2v1000-4fg256c
Description
Virtex-ii Platform Fpgas
Manufacturer
Xilinx Corp.
Datasheet

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JTAG Test Access Port Switching Characteristics
Characterization data for some of the most commonly requested timing parameters shown in
FI
Table 33: Boundary-Scan Port Timing Specifications
DS031-3 (v3.5) November 5, 2007
Product Specification
TCK
Data to be driven out
Data to be captured
R
TMS and TDI setup time
TMS and TDI hold times
Falling edge to TDO output valid
Maximum frequency
TMS
TDO
TCK
TDI
Description
Figure 6: Virtex-II Pro Boundary Scan Port Timing Waveforms
T
TCKTDO
3
T
www.xilinx.com
TAPTCK
1
References
Virtex-II Platform FPGAs: DC and Switching Characteristics
Figure
T
TCKTAP
2
1
2
3
Data Valid
Data Valid
Symbol
T
T
T
TCKTDO
TAPTCK
TCKTAP
F
TCK
Figure 6
Value
10.0
33.0
5.5
0.0
is listed in
ds083-3_11_012104
MHz, max
Module 3 of 4
ns, max
ns, min
ns, min
Units
Table
33.
30

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