ep2sgx60e Altera Corporation, ep2sgx60e Datasheet - Page 22

• Manufacturer Part Number: ep2sgx60e
• Description: 4. Serial Configuration Devices Epcs1, Epcs4, Epcs16, Epcs64, And Epcs128 Data Sheet
• Manufacturer: Altera Corporation

Serial Configuration Device Memory Access
4–22
Configuration Handbook, Volume 2
Write Enable Operation
The write enable operation code is b'0000 0110, and the MSB is listed
first. The write enable operation sets the write enable latch bit, which is
bit 1 in the status register. Always set the write enable latch bit before
write bytes, write status, erase bulk, and erase sector operations.
Figure 4–5
Figures 4–7
Figure 4–5. Write Enable Operation Timing Diagram
Write Disable Operation
The write disable operation code is b'0000 0100, with the MSB listed
first. The write disable operation resets the write enable latch bit, which
is bit 1 in the status register. To prevent the memory from being written
unintentionally, the write enable latch bit is automatically reset when
implementing the write disable operation as well as under the following
conditions:
■
■
■
■
■
Figure 4–6
DCLK
DATA
ASDI
nCS
Power up
Write bytes operation completion
Write status operation completion
Erase bulk operation completion
Erase sector operation completion
shows the timing diagram for the write enable operation.
shows the timing diagram for the write disable operation.
and
4–8
High Impedance
show the status register bit definitions.
0
1
2
Operation Code
3
4
5
6
Altera Corporation
7
May 2008