ep2sgx60e Altera Corporation, ep2sgx60e Datasheet - Page 20

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ep2sgx60e

Manufacturer Part Number
ep2sgx60e
Description
4. Serial Configuration Devices Epcs1, Epcs4, Epcs16, Epcs64, And Epcs128 Data Sheet
Manufacturer
Altera Corporation
Datasheet

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Serial Configuration Device Memory Access
4–20
Configuration Handbook, Volume 2
Operation Codes
This section describes the operations that can be used to access the
memory in serial configuration devices. The DATA, DCLK, ASDI, and nCS
signals access the memory in serial configuration devices. All serial
configuration device operation codes, addresses and data are shifted in
and out of the device serially, with the most significant bit (MSB) first.
The device samples the active serial data input on the first rising edge of
the DCLK after the active low chip select (nCS) input signal is driven low.
Shift the operation code (MSB first) serially into the serial configuration
device through the active serial data input pin. Each operation code bit is
latched into the serial configuration device on the rising edge of the DCLK.
Different operations require a different sequence of inputs. While
executing an operation, you must shift in the desired operation code,
followed by the address bytes, data bytes, both, or neither. The device
Table 4–13. Address Range for Sectors in EPCS4
Table 4–14. Address Range for Sectors in EPCS1
Sector
Sector
7
6
5
4
3
2
1
0
3
2
1
0
Address Range (Byte Addresses in HEX)
Address Range (Byte Addresses in HEX)
H'70000
H'60000
H'50000
H'40000
H'30000
H'20000
H'10000
H'00000
H'18000
H'10000
H'08000
H'00000
Start
Start
Altera Corporation
H'7FFFF
H'6FFFF
H'5FFFF
H'4FFFF
H'3FFFF
H'2FFFF
H'1FFFF
H'0FFFF
H'1FFFF
H'17FFF
H'0FFFF
H'07FFF
End
End
May 2008

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