ep2c35 Altera Corporation, ep2c35 Datasheet - Page 14

• Manufacturer Part Number: ep2c35
• Description: Cyclone Ii Device Family Data Sheet
• Manufacturer: Altera Corporation

Logic Elements
Figure 2–1. Cyclone II EP2C20 Device Block Diagram
Logic Elements
2–2
Cyclone II Device Handbook, Volume 1
M4K Blocks
Embedded
Multipliers
IOEs
PLL
PLL
phase-align double data rate (DDR) signals) provide interface support for
external memory devices such as DDR, DDR2, and single data rate (SDR)
SDRAM, and QDRII SRAM devices at up to 167 MHz.
Figure 2–1
The number of M4K memory blocks, embedded multiplier blocks, PLLs,
rows, and columns vary per device.
The smallest unit of logic in the Cyclone II architecture, the LE, is compact
and provides advanced features with efficient logic utilization. Each LE
features:
■
■
■
■
■
■
■
Logic
Array
A four-input look-up table (LUT), which is a function generator that
can implement any function of four variables
A programmable register
A carry chain connection
A register chain connection
The ability to drive all types of interconnects: local, row, column,
register chain, and direct link interconnects
Support for register packing
Support for register feedback
shows a diagram of the Cyclone II EP2C20 device.
Logic
Array
IOEs
IOEs
Logic
Array
Logic
Array
IOEs
PLL
PLL
M4K Blocks
Altera Corporation
February 2007