saa7130hl-v1 NXP Semiconductors, saa7130hl-v1 Datasheet - Page 15
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saa7130hl-v1
Manufacturer Part Number
saa7130hl-v1
Description
Pci Video Broadcast Decoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7130HL-V1.pdf
(46 pages)
- Current page: 15 of 46
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Philips Semiconductors
SAA7130HL_4
Product data sheet
the audio (left or right) input of the SAA7130HL for analog video decoding and direct audio
streaming to the sound card. On the other hand, the 2nd IF signal of the digital IF-PLL is
fed directly to the interface of the channel decoder (TDA10045), which decodes the signal
into a digital DVB-T Transport Stream (TS).
The SAA7130HL captures this TS via the dedicated peripheral interface into the
configurable internal FIFO for DMA into the PCI memory space.
The packet structure as decoded by the TDA10045 is maintained in a well-defined buffer
structure in the system memory, and therefore can easily be sorted (de-multiplexed) by
the CPU for proper MPEG decoding.
The Broadcast Driver Architecture (BDA) for Windows operating systems supports this
type of hybrid TV capture application, sharing one capture board for analog and digital
TV reception.
Fig 6. Hybrid TV capture board for digital TV (DVB-T) and analog TV reception
DVB terrestrial
or terrestrial
ATV cable
S-video
CVBS
line-in
audio
and
MEMORY
SYSTEM
BRIDGE
SOUTH
CVBS
IF
TV TUNER
Rev. 04 — 11 April 2006
ISA
ANALOG IF-PLL
DECODER FOR
DMA MASTER
SAA7130HL
TV VIDEO
HYBRID TV CAPTURE PCI CARD
INTO PCI
AF
TS
IF
DIGITAL
IF-PLL
digital video, raw VBI, TS
BRIDGE
NORTH
FSB
I
2
C-BUS EEPROM
VENDOR ID
PCI-bus:
I
2
SYSTEM
C-bus
analog audio
DECODER
CHANNEL
loopback
DVB-T
cable
AGP
PCI video broadcast decoder
© Koninklijke Philips Electronics N.V. 2006. All rights reserved.
CACHE MEMORY
LOCAL MEMORY
SAA7130HL
CPU AND
VGA AND
SOUND
CARD
mhc173
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