saa7105h-v1 NXP Semiconductors, saa7105h-v1 Datasheet - Page 6
saa7105h-v1
Manufacturer Part Number
saa7105h-v1
Description
Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
1.SAA7105H-V1.pdf
(71 pages)
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Philips Semiconductors
6
2004 Mar 04
n.c.
PD8
PD9
PD10
PD11
V
V
RESET
TMS
TDO
TCK
V
V
SCL
SDA
n.c.
FSVGC
VSVGC
PIXCLKI
PIXCLKI
PD3
PD2
PD1
PD0
V
V
PIXCLKO
CBO
HSVGC
n.c.
n.c.
n.c.
n.c.
n.c.
OUT_EN
LLC
RTCI
DDD1
SSD1
DDD2
SSD2
DDD3
SSD3
Digital video encoder
PINNING
SYMBOL
PIN TYPE
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
1
2
3
4
5
6
7
8
9
I/pu
I/pu
I/pu
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
S
S
S
S
S
S
I
I
I
I
I
I
I
I
I
I
I
I
(1)
not connected
see Tables 8 to 13 for pin assignment
see Tables 8 to 13 for pin assignment
see Tables 8 to 13 for pin assignment
see Tables 8 to 13 for pin assignment
digital supply voltage 1 for pins PD11 to PD0, PIXCLKI, PIXCLKI, PIXCLKO,
FSVGC, VSVGC, HSVGC, CBO and TVD
digital ground 1
reset input; active LOW
test mode select input for Boundary Scan Test (BST); note 2
test data output for BST; note 2
test clock input for BST; note 2
digital supply voltage 2 (3.3 V for I/Os)
digital ground 2
I
I
not connected
frame synchronization output to Video Graphics Controller (VGC)
(optional input); note 3
vertical synchronization output to VGC (optional input); note 3
inverted pixel clock input
pixel clock input (looped through)
MSB
MSB
MSB
MSB
digital supply voltage 3 (3.3 V for core)
digital ground 3
pixel clock output to VGC
composite blanking output to VGC; active LOW; note 3
horizontal synchronization output to VGC (optional input); note 3
not connected
not connected
not connected
not connected
not connected
if HIGH (default by pull-up): LLC, RTCI and SRES are outputs;
if LOW: LLC, RTCI and SRES are inputs
line-locked clock
real-time control input
2
2
C-bus serial clock input
C-bus serial data input/output
4 with C
5 with C
6 with C
7 with C
B
B
B
B
-Y-C
-Y-C
-Y-C
-Y-C
6
R
R
R
R
4 : 2 : 2; see Tables 8 to 13 for pin assignment
4 : 2 : 2; see Tables 8 to 13 for pin assignment
4 : 2 : 2; see Tables 8 to 13 for pin assignment
4 : 2 : 2; see Tables 8 to 13 for pin assignment
DESCRIPTION
SAA7104H; SAA7105H
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