saa7105e-v1-g NXP Semiconductors, saa7105e-v1-g Datasheet - Page 70

• Manufacturer Part Number: saa7105e-v1-g
• Description: Digital Video Encoder
• Manufacturer: NXP Semiconductors

Philips Semiconductors
Table 113: Digital output signals conversion range
SAA7104E_SAA7105E_2
Product data sheet
Set/out
Digital settings
Digital output
Analog settings
Analog output
12.3 Suggestions for a board layout
CVBS, sync tip-to-white
see
1014
e.g. B DAC = 1Fh
1.23 V (p-p)
Table 37
By setting the reference currents of the DACs as shown in
amplitudes can be achieved for all signal combinations; it is assumed that in
subaddress 16h, parameter DACF = 0000b, that means the fine adjustment for all DACs
in common is set to 0 %.
If S-video output is desired, the adjustment for the C (chrominance subcarrier) output
should be identical to the one for VBS (luminance plus sync) output.
Use separate ground planes for analog and digital ground. Connect these planes only at
one point directly under the device, by using a 0
Use separate supply lines for the analog and digital supply. Place the supply decoupling
capacitors close to the supply pins.
Use L
minimize radiation energy (EMC).
Place the analog coupling (clamp) capacitors close to the analog input pins. Place the
analog termination resistors close to the coupling capacitors.
Be careful of hidden layout capacitors around the crystal application.
Use serial resistors in clock, sync and data lines, to avoid clock or data reflection effects
and to soften data energy.
bead
to
Table 41
(ferrite coil) in each digital supply line close to the decoupling capacitors to
Rev. 02 — 23 December 2005
VBS, sync tip-to-white
see
881
e.g. G DAC = 1Bh
1.00 V (p-p)
Table 37
to
Table 41
SAA7104E; SAA7105E
resistor directly at the supply stage.
RGB, black-to-white
see
876
e.g. R DAC = G DAC = B DAC = 0Bh
0.70 V (p-p)
Table 31
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Table
and
113, standard compliant
Digital video encoder
Table 32
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