saa7129ah-v1 NXP Semiconductors, saa7129ah-v1 Datasheet - Page 45

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saa7129ah-v1

Manufacturer Part Number
saa7129ah-v1
Description
Digital Video Encoder
Manufacturer
NXP Semiconductors
Datasheet
Philips Semiconductors
2003 Dec 09
handbook, full pagewidth
handbook, full pagewidth
Digital video encoder
The data demultiplexing phase is coupled to the internal horizontal phase.
The phase of the RCV2 signal is programmed to 262 for 50 Hz and to 234 for 60 Hz in this example in output mode (RCV2S).
MP input data
output data
LLC1
LLC
MP(n)
RCV2
t SU; DAT
valid
MP pos
t HD; DAT
C B (0)
t h
t HIGH
valid
not
Fig.20 Clock data timing.
Fig.21 Functional timing.
Y(0)
t SU; DAT
t d
45
T LLC1
not valid
MP neg
t f
t HD; DAT
C R (0)
SAA7128AH; SAA7129AH
valid
not
Y(1)
t r
MP pos
valid
Product specification
C B (2)
MHB581
MGB699
2.6 V
1.5 V
0.6 V
2.0 V
0.8 V
2.4 V
0.6 V

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