dsp56857 Freescale Semiconductor, Inc, dsp56857 Datasheet - Page 42

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dsp56857

Manufacturer Part Number
dsp56857
Description
Dsp56857 Digital Signal Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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4.12 JTAG Timing
42
Operating Conditions: V
TCK frequency of operation
TCK cycle time
TCK clock pulse width
TMS, TDI data setup time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
DE assertion time
SCI receive
SCI receive
1.
operation, T = 8.33ns.
2.
3.
data pin
data pin
Timing is both wait state and frequency dependent. For the values listed, T = clock cycle. For 120MHz
TCK frequency of operation must be less than 1/4 the processor rate.
Parameters listed are guaranteed by design.
(Input)
(Input)
RXD
TXD
SS
Characteristic
= V
SSIO
2
= V
SSA
= 0 V, V
Figure 4-28 RXD Pulse Width
Figure 4-29 TXD Pulse Width
Table 4-14 JTAG Timing
DD
56857 Technical Data, Rev. 6
= 1.62-1.98V, V
RXD
TXD
PW
PW
DDIO
= V
Symbol
DDA
t
TRST
t
f
t
t
t
t
t
t
PW
OP
DH
CY
DS
DV
TS
DE
= 3.0–3.6V, T
1, 3
A
33.3
16.6
Min
DC
4T
35
= –40° to +120°C, C
3
3
Max
30
12
10
Freescale Semiconductor
L
≤ 50pF, f
op
= 120MHz
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns

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